Searched refs:regCP_RB0_BASE (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v12_0.c | 105 SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_BASE),
2793 WREG32_SOC15(GC, 0, regCP_RB0_BASE, rb_addr); in gfx_v12_0_cp_gfx_resume()
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| H A D | gfx_v11_0.c | 165 SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_BASE),
3834 WREG32_SOC15(GC, 0, regCP_RB0_BASE, rb_addr); in gfx_v11_0_cp_gfx_resume()
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| H A D | gfx_v12_1.c | 93 SOC15_REG_ENTRY_STR(GC, 0, regCP_RB0_BASE),
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 2784 #define regCP_RB0_BASE … macro
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| H A D | gc_9_4_2_offset.h | 333 #define regCP_RB0_BASE … macro
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| H A D | gc_12_0_0_offset.h | 3456 #define regCP_RB0_BASE … macro
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| H A D | gc_11_0_3_offset.h | 4330 #define regCP_RB0_BASE … macro
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| H A D | gc_11_0_0_offset.h | 4114 #define regCP_RB0_BASE … macro
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