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Searched refs:regCP_MEC_ME1_HEADER_DUMP (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c197 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),
198 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),
199 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),
200 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),
201 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),
202 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),
203 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),
204 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),
H A Dgfx_v11_0.c7112 if (i && gc_cp_reg_list_11[reg].reg_offset == regCP_MEC_ME1_HEADER_DUMP) in gfx_v11_ip_print()
7181 regCP_MEC_ME1_HEADER_DUMP) in gfx_v11_ip_dump()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h144 #define regCP_MEC_ME1_HEADER_DUMP … macro
H A Dgc_9_4_2_offset.h187 #define regCP_MEC_ME1_HEADER_DUMP … macro
H A Dgc_12_0_0_offset.h2110 #define regCP_MEC_ME1_HEADER_DUMP … macro
H A Dgc_11_0_3_offset.h2010 #define regCP_MEC_ME1_HEADER_DUMP … macro
H A Dgc_11_0_0_offset.h1948 #define regCP_MEC_ME1_HEADER_DUMP … macro