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Searched refs:regCP_HQD_PQ_DOORBELL_CONTROL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c1229 data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL); in mes_v11_0_queue_init_register()
1232 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data); in mes_v11_0_queue_init_register()
1263 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, in mes_v11_0_queue_init_register()
1531 data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL); in mes_v11_0_kiq_dequeue()
1536 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data); in mes_v11_0_kiq_dequeue()
1538 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0); in mes_v11_0_kiq_dequeue()
H A Dmes_v12_0.c1394 data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL); in mes_v12_0_queue_init_register()
1397 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data); in mes_v12_0_queue_init_register()
1428 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, in mes_v12_0_queue_init_register()
1709 data = RREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL); in mes_v12_0_kiq_dequeue_sched()
1714 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, data); in mes_v12_0_kiq_dequeue_sched()
1716 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, 0); in mes_v12_0_kiq_dequeue_sched()
H A Damdgpu_amdkfd_gc_9_4_3.c309 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_DOORBELL_CONTROL, data); in kgd_gfx_v9_4_3_hqd_load()
H A Damdgpu_amdkfd_gfx_v11.c205 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL), data); in hqd_load_v11()
H A Dgfx_v12_0.c167 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL),
3273 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_kiq_init_register()
3334 WREG32_SOC15(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL, in gfx_v12_0_kiq_init_register()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3312 #define regCP_HQD_PQ_DOORBELL_CONTROL … macro
H A Dgc_9_4_2_offset.h723 #define regCP_HQD_PQ_DOORBELL_CONTROL … macro
H A Dgc_12_0_0_offset.h3872 #define regCP_HQD_PQ_DOORBELL_CONTROL … macro
H A Dgc_11_0_3_offset.h4854 #define regCP_HQD_PQ_DOORBELL_CONTROL … macro
H A Dgc_11_0_0_offset.h4630 #define regCP_HQD_PQ_DOORBELL_CONTROL … macro