Home
last modified time | relevance | path

Searched refs:regCP_GFX_RS64_INSTR_PNTR1 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h6883 #define regCP_GFX_RS64_INSTR_PNTR1 … macro
H A Dgc_12_0_0_offset.h5302 #define regCP_GFX_RS64_INSTR_PNTR1 … macro
H A Dgc_11_0_3_offset.h8414 #define regCP_GFX_RS64_INSTR_PNTR1 … macro
H A Dgc_11_0_0_offset.h8110 #define regCP_GFX_RS64_INSTR_PNTR1 … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c118 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_RS64_INSTR_PNTR1),