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Searched refs:regCM0_CM_GAMCOR_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h3424 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h3657 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h4627 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h4648 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h4807 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h3898 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h3423 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h4118 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h3589 #define regCM0_CM_GAMCOR_CONTROL_BASE_IDX … macro