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Searched refs:regBL_PWM_PERIOD_CNTL_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11704 #define regBL_PWM_PERIOD_CNTL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h11713 #define regBL_PWM_PERIOD_CNTL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h11894 #define regBL_PWM_PERIOD_CNTL_BASE_IDX … macro