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Searched refs:ras_error_status (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmca_v3_0.c33 void *ras_error_status) in mca_v3_0_mp0_query_ras_error_count() argument
37 ras_error_status); in mca_v3_0_mp0_query_ras_error_count()
67 void *ras_error_status) in mca_v3_0_mp1_query_ras_error_count() argument
71 ras_error_status); in mca_v3_0_mp1_query_ras_error_count()
87 void *ras_error_status) in mca_v3_0_mpio_query_ras_error_count() argument
91 ras_error_status); in mca_v3_0_mpio_query_ras_error_count()
H A Dumc_v8_7.c91 void *ras_error_status) in umc_v8_7_ecc_info_query_ras_error_count() argument
93 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in umc_v8_7_ecc_info_query_ras_error_count()
161 void *ras_error_status) in umc_v8_7_ecc_info_query_ras_error_address() argument
163 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in umc_v8_7_ecc_info_query_ras_error_address()
302 void *ras_error_status) in umc_v8_7_query_ras_error_count() argument
304 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in umc_v8_7_query_ras_error_count()
369 void *ras_error_status) in umc_v8_7_query_ras_error_address() argument
371 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in umc_v8_7_query_ras_error_address()
H A Dumc_v8_10.c162 void *ras_error_status) in umc_v8_10_query_ras_error_count() argument
165 umc_v8_10_query_ecc_error_count, ras_error_status); in umc_v8_10_query_ras_error_count()
288 void *ras_error_status) in umc_v8_10_query_ras_error_address() argument
291 umc_v8_10_query_error_address, ras_error_status); in umc_v8_10_query_ras_error_address()
395 void *ras_error_status) in umc_v8_10_ecc_info_query_ras_error_count() argument
398 umc_v8_10_ecc_info_query_ecc_error_count, ras_error_status); in umc_v8_10_ecc_info_query_ras_error_count()
439 void *ras_error_status) in umc_v8_10_ecc_info_query_ras_error_address() argument
442 umc_v8_10_ecc_info_query_error_address, ras_error_status); in umc_v8_10_ecc_info_query_ras_error_address()
H A Damdgpu_umc.c96 void *ras_error_status) in amdgpu_umc_handle_bad_pages() argument
98 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in amdgpu_umc_handle_bad_pages()
128 ras_error_status); in amdgpu_umc_handle_bad_pages()
152 ras_error_status); in amdgpu_umc_handle_bad_pages()
159 ras_error_status); in amdgpu_umc_handle_bad_pages()
183 ras_error_status); in amdgpu_umc_handle_bad_pages()
221 void *ras_error_status, in amdgpu_umc_do_page_retirement() argument
225 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in amdgpu_umc_do_page_retirement()
229 amdgpu_umc_handle_bad_pages(adev, ras_error_status); in amdgpu_umc_do_page_retirement()
319 void *ras_error_status, in amdgpu_umc_process_ras_data_cb() argument
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H A Dumc_v6_7.c181 void *ras_error_status) in umc_v6_7_ecc_info_query_ras_error_count() argument
184 umc_v6_7_ecc_info_querry_ecc_error_count, ras_error_status); in umc_v6_7_ecc_info_query_ras_error_count()
255 void *ras_error_status) in umc_v6_7_ecc_info_query_ras_error_address() argument
258 umc_v6_7_ecc_info_query_error_address, ras_error_status); in umc_v6_7_ecc_info_query_ras_error_address()
433 void *ras_error_status) in umc_v6_7_query_ras_error_count() argument
436 umc_v6_7_query_ecc_error_count, ras_error_status); in umc_v6_7_query_ras_error_count()
485 void *ras_error_status) in umc_v6_7_query_ras_error_address() argument
488 umc_v6_7_query_error_address, ras_error_status); in umc_v6_7_query_ras_error_address()
H A Dsdma_v4_4.c197 void *ras_error_status) in sdma_v4_4_query_ras_error_count_by_instance() argument
199 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in sdma_v4_4_query_ras_error_count_by_instance()
252 static void sdma_v4_4_query_ras_error_count(struct amdgpu_device *adev, void *ras_error_status) in sdma_v4_4_query_ras_error_count() argument
257 if (sdma_v4_4_query_ras_error_count_by_instance(adev, i, ras_error_status)) { in sdma_v4_4_query_ras_error_count()
H A Dumc_v8_14.c111 void *ras_error_status) in umc_v8_14_query_ras_error_count() argument
114 umc_v8_14_query_error_count_per_channel, ras_error_status); in umc_v8_14_query_ras_error_count()
H A Dhdp_v4_0.c57 void *ras_error_status) in hdp_v4_0_query_ras_error_count() argument
59 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in hdp_v4_0_query_ras_error_count()
H A Damdgpu_mca.h153 void *ras_error_status);
H A Damdgpu_mca.c74 void *ras_error_status) in amdgpu_mca_query_ras_error_count() argument
76 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in amdgpu_mca_query_ras_error_count()
H A Dmmhub_v1_0.c795 void *ras_error_status) in mmhub_v1_0_query_ras_error_count() argument
797 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in mmhub_v1_0_query_ras_error_count()
H A Dsdma_v4_0.c2664 uint32_t instance, void *ras_error_status) in sdma_v4_0_query_ras_error_count_by_instance()
2666 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in sdma_v4_0_query_ras_error_count_by_instance()
2685 static void sdma_v4_0_query_ras_error_count(struct amdgpu_device *adev, void *ras_error_status) in sdma_v4_0_query_ras_error_count()
2690 if (sdma_v4_0_query_ras_error_count_by_instance(adev, i, ras_error_status)) { in sdma_v4_0_query_ras_error_count()
2663 sdma_v4_0_query_ras_error_count_by_instance(struct amdgpu_device * adev,uint32_t instance,void * ras_error_status) sdma_v4_0_query_ras_error_count_by_instance() argument
2684 sdma_v4_0_query_ras_error_count(struct amdgpu_device * adev,void * ras_error_status) sdma_v4_0_query_ras_error_count() argument
H A Damdgpu_gfx.c1113 void *ras_error_status, in amdgpu_kiq_rreg()
1114 void (*func)(struct amdgpu_device *adev, void *ras_error_status, in amdgpu_kiq_rreg()
1120 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in amdgpu_kiq_rreg()
1128 func(adev, ras_error_status, i); in amdgpu_kiq_rreg()
1095 amdgpu_gfx_ras_error_func(struct amdgpu_device * adev,void * ras_error_status,void (* func)(struct amdgpu_device * adev,void * ras_error_status,int xcc_id)) amdgpu_gfx_ras_error_func() argument
H A Dgfx_v9_0.c918 void *ras_error_status);
7108 void *ras_error_status) in gfx_v9_0_emit_wave_limit_cs()
7110 struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status; in gfx_v9_0_emit_wave_limit_cs()
7061 gfx_v9_0_query_ras_error_count(struct amdgpu_device * adev,void * ras_error_status) gfx_v9_0_query_ras_error_count() argument