/linux/arch/powerpc/platforms/52xx/ |
H A D | mpc52xx_sleep.S | 21 lwz r8, 0x14(r6) /* intr->main_mask */ 22 ori r8, r8, 0x1 23 xori r8, r8, 0x1 24 stw r8, 0x14(r6) 28 li r8, 0x1 29 stw r8, 0x40(r6) /* intr->main_emulate */ 69 lwz r8, 0x4(r4) /* sdram->ctrl */ 71 oris r8, r8, 0x8000 /* mode_en */ 72 stw r8, 0x4(r4) 75 ori r8, r8, 0x0002 /* soft_pre */ [all …]
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/linux/arch/powerpc/lib/ |
H A D | strlen_32.S | 55 2: subf r8, r7, r9 56 and. r8, r8, r6 58 andc. r8, r8, r9 60 andc r8, r9, r6 62 subfe r8, r6, r8 63 nor r8, r8, r9 64 cntlzw r8, r8 66 srwi r8, r8, 3 67 add r3, r3, r8 72 orc r8, r8, r8 [all …]
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H A D | copypage_64.S | 36 srd r8,r5,r11 38 mtctr r8 46 srdi r8,r5,7 /* page is copied in 128 byte strides */ 47 addi r8,r8,-1 /* one stride copied outside loop */ 49 mtctr r8 54 ldu r8,24(r4) 60 std r8,32(r3) 70 ld r8,64(r4) 76 std r8,96(r3) 86 ldu r8,128(r4) [all …]
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/linux/tools/testing/selftests/powerpc/stringloops/ |
H A D | strlen_32.S | 55 2: subf r8, r7, r9 56 and. r8, r8, r6 58 andc. r8, r8, r9 60 andc r8, r9, r6 62 subfe r8, r6, r8 63 nor r8, r8, r9 64 cntlzw r8, r8 66 srwi r8, r8, 3 67 add r3, r3, r8 72 orc r8, r8, r8 [all …]
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/linux/arch/powerpc/mm/book3s32/ |
H A D | hash_low.S | 53 lis r8, (mmu_hash_lock - PAGE_OFFSET)@h 54 ori r8, r8, (mmu_hash_lock - PAGE_OFFSET)@l 57 11: lwz r6,0(r8) 60 10: lwarx r6,0,r8 63 stwcx. r0,0,r8 70 mfspr r8,SPRN_SPRG_THREAD /* current task's THREAD (phys) */ 71 lwz r5,PGDIR(r8) /* virt page-table root */ 84 lwz r8,0(r5) /* get pmd entry */ 85 rlwinm. r8,r8,0,0,19 /* extract address of pte page */ 87 rlwinm r8,r4,13,19,29 /* Compute pgdir/pmd offset */ [all …]
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/linux/arch/arm/lib/ |
H A D | memset.S | 40 UNWIND( .save {r8, lr} ) 41 stmfd sp!, {r8, lr} 42 mov r8, r1 46 stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time. 47 stmiage ip!, {r1, r3, r8, lr} 48 stmiage ip!, {r1, r3, r8, lr} 49 stmiage ip!, {r1, r3, r8, lr} 51 ldmfdeq sp!, {r8, pc} @ Now <64 bytes to go. 56 stmiane ip!, {r1, r3, r8, lr} 57 stmiane ip!, {r1, r3, r8, lr} [all …]
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/linux/arch/powerpc/kexec/ |
H A D | relocate_32.S | 163 1: mflr r8 164 addi r8, r8, (2f-1b) /* Find the target offset */ 167 mtspr SPRN_SRR0, r8 183 li r8, 0 /* PageNumber */ 187 rotlwi r3, r8, 28 /* Create EPN (bits 0-3) */ 196 addi r8, r8, 1 /* Increment PN */ 198 cmpwi r8, 8 /* Are we done ? */ 207 1: mflr r8 208 and r8, r8, r11 /* Get our offset within page */ 209 addi r8, r8, (2f-1b) [all …]
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/linux/arch/microblaze/lib/ |
H A D | fastcopy.S | 103 andi r8, r6, 0xfffffffc /* as = s & ~3 */ 105 lwi r11, r8, 0 /* h = *(as + 0) */ 115 lwi r12, r8, 4 /* v = *(as + 4) */ 120 lwi r12, r8, 8 /* v = *(as + 8) */ 125 lwi r12, r8, 12 /* v = *(as + 12) */ 130 lwi r12, r8, 16 /* v = *(as + 16) */ 135 lwi r12, r8, 20 /* v = *(as + 20) */ 140 lwi r12, r8, 24 /* v = *(as + 24) */ 145 lwi r12, r8, 28 /* v = *(as + 28) */ 150 lwi r12, r8, 32 /* v = *(as + 32) */ [all …]
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/linux/arch/sh/kernel/cpu/sh2a/ |
H A D | entry.S | 71 mov r2,r8 ! r8 = previus stack top 74 mov.l @r8+,r2 75 mov.l @r8+,r0 76 mov.l @r8+,r1 84 mov r2,r8 ! r8 = previous stack top 87 mov.l @r8+,r2 ! old R2 88 mov.l @r8+,r0 ! old R0 89 mov.l @r8+,r1 ! old R1 90 mov.l @r8+,r10 ! old PC 91 mov.l @r8+,r11 ! old SR [all …]
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/linux/arch/arm/mm/ |
H A D | abort-lv4t.S | 29 ldr r8, [r4] @ read arm instruction 31 tst r8, #1 << 20 @ L = 1 -> write? 33 and r7, r8, #15 << 24 58 mov r1, r8 62 tst r8, #1 << 21 @ check writeback bit 67 and r6, r8, r7 68 and r9, r8, r7, lsl #1 70 and r9, r8, r7, lsl #2 72 and r9, r8, r7, lsl #3 77 and r9, r8, #15 << 16 @ Extract 'n' from instruction [all …]
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/linux/arch/powerpc/kernel/vdso/ |
H A D | cacheflush.S | 45 subf r8,r6,r4 /* compute length */ 46 add r8,r8,r5 /* ensure we get enough */ 49 PPC_SRL. r8,r8,r9 /* compute line count */ 51 srwi. r8, r8, L1_CACHE_SHIFT 56 mtctr r8 72 subf r8,r6,r4 /* compute length */ 73 add r8,r8,r5 75 PPC_SRL. r8,r8,r9 /* compute line count */ 79 mtctr r8
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/ |
H A D | kernel.fuc | 99 push $r8 100 nv_iord($r8, NV_PPWR_TIMER_LOW) 103 sub b32 $r9 $r8 106 pop $r8 120 push $r8 121 nv_iord($r8, NV_PPWR_TIMER_LOW) 128 sub b32 $r9 $r8 132 pop $r8 138 // $r8 - NV_PPWR_INTR 179 push $r8 [all …]
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H A D | memx.fuc | 85 mov $r8 0x1610 86 nv_rd32($r7, $r8) 91 nv_wr32($r8, $r7) 95 nv_rd32($r8, $r6) 96 and $r8 $r7 97 nv_wr32($r6, $r8) 100 nv_rd32($r8, $r6) 101 and $r8 $r7 102 nv_wr32($r6, $r8) 105 nv_rd32($r8, $r6) [all …]
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/linux/arch/sh/kernel/ |
H A D | relocate_kernel.S | 32 mov.l r8, @-r15 45 stc sr, r8 46 or r9, r8 47 ldc r8, sr 60 stc sr, r8 61 and r9, r8 62 ldc r8, sr 92 stc sr, r8 93 and r9, r8 94 ldc r8, sr [all …]
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/linux/arch/powerpc/boot/ |
H A D | crt0.S | 72 9: lwz r8,0(r12) /* get tag */ 73 cmpwi r8,0 75 cmpwi r8,RELA 79 11: cmpwi r8,RELASZ 84 cmpwi r8,RELAENT 116 lwz r8,p_etext-p_base(r10) 120 cmplw cr0,r9,r8 127 lwz r8,p_end-p_base(r10) 131 cmplw cr0,r9,r8 135 lwz r8,p_pstack-p_base(r10) [all …]
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/linux/arch/powerpc/crypto/ |
H A D | aes-spe-keys.S | 32 xor r8,r8,r8; \ 79 LOAD_KEY(r8,r4,12) 83 stw r8,12(r3) 88 mr r14,r8 /* apply LS_BOX to 4th temp */ 95 xor r8,r8,r7 99 stw r8,12(r3) 121 LOAD_KEY(r8,r4,12) 127 stw r8,12(r3) 141 xor r8,r8,r7 142 xor r9,r9,r8 [all …]
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/linux/arch/powerpc/kvm/ |
H A D | book3s_hv_interrupts.S | 68 ori r8, r9, LPCR_HDICE 69 mtspr SPRN_LPCR, r8 71 mfspr r8,SPRN_DEC 73 extsw r8,r8 74 mtspr SPRN_HDEC,r8 75 add r8,r8,r7 76 std r8,HSTATE_DECEXP(r13) 116 mfspr r8, SPRN_MMCR2 142 std r8, HSTATE_MMCR2(r13) 149 mfspr r8, SPRN_PMC5 [all …]
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H A D | book3s_hv_rmhandlers.S | 130 ld r8, 112+PPC_LR_STKOFF(r1) 142 mtsrr0 r8 163 ld r8,VCORE_LPCR(r5) 164 mtspr SPRN_LPCR,r8 548 addi r8, r5, VCORE_ENTRY_EXIT 549 21: lwarx r3, 0, r8 553 stwcx. r3, 0, r8 578 22: ld r8,VCORE_TB_OFFSET(r5) 579 cmpdi r8,0 581 std r8, VCORE_TB_OFFSET_APPL(r5) [all …]
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/linux/arch/arm/mach-omap1/ |
H A D | ams-delta-fiq-handler.S | 104 mov r8, #2 @ reset FIQ agreement 105 str r8, [r12, #IRQ_CONTROL_REG_OFFSET] 110 mov r8, #1 111 orr r8, r11, r8, lsl r10 @ mask spurious interrupt 112 str r8, [r12, #IRQ_MIR_REG_OFFSET] 144 ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input 150 ands r8, r8, #KEYBRD_DATA_MASK @ check start bit - detected? 153 @ r8 contains KEYBRD_DATA_MASK, use it 154 str r8, [r9, #BUF_STATE] @ enter data processing state 169 @ r8 still contains GPIO input bits [all …]
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/linux/arch/x86/crypto/ |
H A D | aegis128-aesni-asm.S | 79 mov LEN, %r8 80 and $0x1, %r8 83 mov LEN, %r8 84 and $0x1E, %r8 85 add SRC, %r8 86 mov (%r8), %r9b 89 mov LEN, %r8 90 and $0x2, %r8 93 mov LEN, %r8 94 and $0x1C, %r8 [all …]
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/linux/arch/powerpc/kernel/ |
H A D | head_8xx.S | 463 add r10, r10, r8 ;b 151f 629 li r8, 0 630 mtspr SPRN_MI_CTR, r8 /* remove PINNED ITLB entries */ 636 lis r8, MI_APG_INIT@h /* Set protection modes */ 637 ori r8, r8, MI_APG_INIT@l 638 mtspr SPRN_MI_AP, r8 639 lis r8, MD_APG_INIT@h 640 ori r8, r8, MD_APG_INIT@l 641 mtspr SPRN_MD_AP, r8 644 lis r8, MI_RSV4I@h [all …]
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/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/ |
H A D | com.fuc | 35 ld b32 $r8 D[$r13 + 0x0] // GET 37 xor $r8 8 38 cmpu b32 $r8 $r9 46 and $r8 $r9 7 47 shl b32 $r8 3 48 add b32 $r8 $r13 49 add b32 $r8 8 50 st b32 D[$r8 + 0x0] $r14 51 st b32 D[$r8 + 0x4] $r15 69 ld b32 $r8 D[$r13 + 0x0] // GET [all …]
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/linux/arch/arm/crypto/ |
H A D | chacha-scalar-core.S | 37 X8_X10 .req r8 // shared by x8 and x10 180 __ldrd r8, r9, sp, 32 182 add X0, X0, r8 186 _le32_bswap_4x X0, X1, X2, X3, r8 187 ldmia r12!, {r8-r11} 188 eor X0, X0, r8 195 __ldrd r8, r9, sp, 48 197 add X4, r8, X4, ror #brot 202 _le32_bswap_4x X4, X5, X6, X7, r8 211 __ldrd r8, r9, sp, 32 [all …]
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/linux/arch/arm/mach-omap2/ |
H A D | sram242x.S | 34 mov r8, r3 @ capture force parameter 73 cmp r8, #0x1 @ if forced unlock exit 193 ldr r8, [r10] @ get value 195 and r8, r8, r7 @ apply mask to clear bits 196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation. 197 str r8, [r10] @ set up for change. 199 orr r8, r8, r7 @ build value for force 200 str r8, [r10] @ Force transition to L1 203 ldr r8, [r10] @ get value 204 add r8, r8, #0x2 @ give it at most 62uS (min 31+) [all …]
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H A D | sram243x.S | 34 mov r8, r3 @ capture force parameter 73 cmp r8, #0x1 @ if forced unlock exit 193 ldr r8, [r10] @ get value 195 and r8, r8, r7 @ apply mask to clear bits 196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation. 197 str r8, [r10] @ set up for change. 199 orr r8, r8, r7 @ build value for force 200 str r8, [r10] @ Force transition to L1 203 ldr r8, [r10] @ get value 204 add r8, r8, #0x2 @ give it at most 62uS (min 31+) [all …]
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