| /linux/drivers/gpu/drm/bridge/synopsys/ |
| H A D | dw-hdmi-qp.c | 217 unsigned long pixel_clk,
224 if (pixel_clk == common_tmds_n_table[i].tmds) { in dw_hdmi_qp_match_tmds_n_table()
250 unsigned int pixel_clk)
252 u64 cts = mul_u32_u32(pixel_clk, n); in dw_hdmi_qp_audio_math_diff() argument
258 unsigned long pixel_clk,
270 if (dw_hdmi_qp_audio_math_diff(freq, ideal_n, pixel_clk) == 0) in dw_hdmi_qp_compute_n()
274 u64 diff = dw_hdmi_qp_audio_math_diff(freq, n, pixel_clk); in dw_hdmi_qp_compute_n()
294 static unsigned int dw_hdmi_qp_find_n(struct dw_hdmi_qp *hdmi, unsigned long pixel_clk, in dw_hdmi_qp_compute_n()
297 int n = dw_hdmi_qp_match_tmds_n_table(hdmi, pixel_clk, sample_rate); in dw_hdmi_qp_find_n()
303 pixel_clk); in dw_hdmi_qp_find_n()
219 dw_hdmi_qp_match_tmds_n_table(struct dw_hdmi_qp * hdmi,unsigned long pixel_clk,unsigned long freq) dw_hdmi_qp_match_tmds_n_table() argument
260 dw_hdmi_qp_compute_n(struct dw_hdmi_qp * hdmi,unsigned long pixel_clk,unsigned long freq) dw_hdmi_qp_compute_n() argument
296 dw_hdmi_qp_find_n(struct dw_hdmi_qp * hdmi,unsigned long pixel_clk,unsigned long sample_rate) dw_hdmi_qp_find_n() argument
310 dw_hdmi_qp_find_cts(struct dw_hdmi_qp * hdmi,unsigned long pixel_clk,unsigned long sample_rate) dw_hdmi_qp_find_cts() argument
[all...] |
| H A D | dw-mipi-dsi2.c | 325 u64 pixel_clk, ipi_clk, phy_hsclk; in dw_mipi_dsi2_phy_ratio_cfg() local
336 pixel_clk = mode->crtc_clock * MSEC_PER_SEC; in dw_mipi_dsi2_phy_ratio_cfg()
337 ipi_clk = pixel_clk / 4; in dw_mipi_dsi2_phy_ratio_cfg()
457 u64 pixel_clk, phy_hs_clk; in dw_mipi_dsi2_ipi_set() local
478 pixel_clk = mode->crtc_clock * MSEC_PER_SEC; in dw_mipi_dsi2_ipi_set()
483 hsa_time = DIV_ROUND_CLOSEST_ULL(tmp << 16, pixel_clk); in dw_mipi_dsi2_ipi_set()
487 hbp_time = DIV_ROUND_CLOSEST_ULL(tmp << 16, pixel_clk); in dw_mipi_dsi2_ipi_set()
491 hact_time = DIV_ROUND_CLOSEST_ULL(tmp << 16, pixel_clk); in dw_mipi_dsi2_ipi_set()
495 hline_time = DIV_ROUND_CLOSEST_ULL(tmp << 16, pixel_clk); in dw_mipi_dsi2_ipi_set()
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| /linux/drivers/media/platform/cadence/ |
| H A D | cdns-csi2rx.c | 131 struct clk *pixel_clk[CSI2RX_STREAMS_MAX];
859 csi2rx->pixel_clk[i] = devm_clk_get(&pdev->dev, name); in csi2rx_probe()
860 if (IS_ERR(csi2rx->pixel_clk[i])) { in csi2rx_probe()
862 return PTR_ERR(csi2rx->pixel_clk[i]); in csi2rx_probe()
1040 clk_disable_unprepare(csi2rx->pixel_clk[i]);
1062 ret = clk_prepare_enable(csi2rx->pixel_clk[i]);
1080 clk_disable_unprepare(csi2rx->pixel_clk[i]);
137 struct clk *pixel_clk[CSI2RX_STREAMS_MAX]; global() member
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| H A D | cdns-csi2tx.c | 108 struct clk *pixel_clk[CSI2TX_STREAMS_MAX]; member
485 csi2tx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name); in csi2tx_get_resources()
486 if (IS_ERR(csi2tx->pixel_clk[i])) { in csi2tx_get_resources()
489 return PTR_ERR(csi2tx->pixel_clk[i]); in csi2tx_get_resources()
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| /linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_dpi.c | 75 struct clk *pixel_clk; member
512 clk_disable_unprepare(dpi->pixel_clk); in mtk_dpi_power_off()
536 ret = clk_prepare_enable(dpi->pixel_clk); in mtk_dpi_power_on()
592 clk_set_rate(dpi->pixel_clk, vm->pixelclock * 2); in mtk_dpi_set_pixel_clk()
594 clk_set_rate(dpi->pixel_clk, vm->pixelclock); in mtk_dpi_set_pixel_clk()
596 vm->pixelclock = clk_get_rate(dpi->pixel_clk); in mtk_dpi_set_pixel_clk()
1297 dpi->pixel_clk = devm_clk_get(dev, "pixel"); in mtk_dpi_probe()
1298 if (IS_ERR(dpi->pixel_clk)) in mtk_dpi_probe()
1299 return dev_err_probe(dev, PTR_ERR(dpi->pixel_clk), in mtk_dpi_probe()
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| /linux/drivers/gpu/drm/msm/dsi/ |
| H A D | dsi_host.c | 119 struct clk *pixel_clk; member
336 msm_host->pixel_clk = msm_clk_get(pdev, "pixel"); in dsi_clk_init()
337 if (IS_ERR(msm_host->pixel_clk)) in dsi_clk_init()
338 return dev_err_probe(&pdev->dev, PTR_ERR(msm_host->pixel_clk), in dsi_clk_init()
396 ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate); in dsi_link_clk_set_rate_6g()
450 ret = clk_prepare_enable(msm_host->pixel_clk); in dsi_link_clk_enable_6g()
466 clk_disable_unprepare(msm_host->pixel_clk); in dsi_link_clk_enable_6g()
501 ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate); in dsi_link_clk_set_rate_v2()
532 ret = clk_prepare_enable(msm_host->pixel_clk); in dsi_link_clk_enable_v2()
555 clk_disable_unprepare(msm_host->pixel_clk); in dsi_link_clk_disable_6g()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | clock_source.h | 180 unsigned int pixel_clk,
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| /linux/drivers/gpu/drm/aspeed/ |
| H A D | aspeed_gfx_crtc.c | 93 clk_set_rate(priv->pixel_clk, m->crtc_clock * 1000); in aspeed_gfx_crtc_mode_set_nofb()
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| /linux/drivers/gpu/drm/amd/display/include/ |
| H A D | grph_object_ctrl_defs.h | 128 uint32_t pixel_clk; /* in KHz */ member
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_clock_source.c | 1380 unsigned int pixel_clk, in dcn3_get_pix_clk_dividers()
1386 REG_WRITE(PHASE[inst], pixel_clk); in dcn3_get_pix_clk_dividers()
1309 dcn20_override_dp_pix_clk(struct clock_source * clock_source,unsigned int inst,unsigned int pixel_clk,unsigned int ref_clk) dcn20_override_dp_pix_clk() argument
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| H A D | bios_parser.c | 1398 info->lcd_timing.pixel_clk = in get_embedded_panel_info_v1_2()
1520 info->lcd_timing.pixel_clk = in get_embedded_panel_info_v1_3()
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| H A D | bios_parser2.c | 1538 info->lcd_timing.pixel_clk = le16_to_cpu(lvds->lcd_timing.pixclk) * 10; in bios_parser_get_embedded_panel_info()
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