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/linux/drivers/staging/media/atomisp/pci/runtime/pipeline/src/
H A Dpipeline.c35 struct ia_css_pipeline *pipeline,
44 static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline);
57 struct ia_css_pipeline *pipeline, in ia_css_pipeline_create() argument
62 assert(pipeline); in ia_css_pipeline_create()
64 pipeline, pipe_id, pipe_num, dvs_frame_delay); in ia_css_pipeline_create()
65 if (!pipeline) { in ia_css_pipeline_create()
70 pipeline_init_defaults(pipeline, pipe_id, pipe_num, dvs_frame_delay); in ia_css_pipeline_create()
99 void ia_css_pipeline_destroy(struct ia_css_pipeline *pipeline) in ia_css_pipeline_destroy() argument
101 assert(pipeline); in ia_css_pipeline_destroy()
102 IA_CSS_ENTER_PRIVATE("pipeline = %p", pipeline); in ia_css_pipeline_destroy()
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/linux/drivers/gpu/drm/xen/
H A Dxen_drm_front_conn.c50 struct xen_drm_front_drm_pipeline *pipeline = in connector_detect() local
54 pipeline->conn_connected = false; in connector_detect()
56 return pipeline->conn_connected ? connector_status_connected : in connector_detect()
64 struct xen_drm_front_drm_pipeline *pipeline = in connector_get_modes() local
75 videomode.hactive = pipeline->width; in connector_get_modes()
76 videomode.vactive = pipeline->height; in connector_get_modes()
105 struct xen_drm_front_drm_pipeline *pipeline = in xen_drm_front_conn_init() local
110 pipeline->conn_connected = true; in xen_drm_front_conn_init()
H A Dxen_drm_front.h120 struct xen_drm_front_drm_pipeline pipeline[XEN_DRM_FRONT_MAX_CRTCS]; member
133 int xen_drm_front_mode_set(struct xen_drm_front_drm_pipeline *pipeline,
/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_crtc.c95 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in crtc_flush() local
102 return mdp5_ctl_commit(ctl, pipeline, flush_mask, start); in crtc_flush()
127 mixer = mdp5_cstate->pipeline.mixer; in crtc_flush_all()
130 r_mixer = mdp5_cstate->pipeline.r_mixer; in crtc_flush_all()
141 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in complete_flip() local
159 mdp5_ctl_blend(ctl, pipeline, NULL, NULL, 0, 0); in complete_flip()
215 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in blend_setup() local
220 struct mdp5_hw_mixer *mixer = pipeline->mixer; in blend_setup()
222 struct mdp5_hw_mixer *r_mixer = pipeline->r_mixer; in blend_setup()
355 mdp5_ctl_blend(ctl, pipeline, stage, r_stage, plane_cnt, in blend_setup()
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H A Dmdp5_cmd_encoder.c129 struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); in mdp5_cmd_encoder_disable() local
136 mdp5_ctl_set_encoder_state(ctl, pipeline, false); in mdp5_cmd_encoder_disable()
137 mdp5_ctl_commit(ctl, pipeline, mdp_ctl_flush_mask_encoder(intf), true); in mdp5_cmd_encoder_disable()
147 struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); in mdp5_cmd_encoder_enable() local
155 mdp5_ctl_commit(ctl, pipeline, mdp_ctl_flush_mask_encoder(intf), true); in mdp5_cmd_encoder_enable()
157 mdp5_ctl_set_encoder_state(ctl, pipeline, true); in mdp5_cmd_encoder_enable()
H A Dmdp5_encoder.c125 struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); in mdp5_vid_encoder_disable() local
134 mdp5_ctl_set_encoder_state(ctl, pipeline, false); in mdp5_vid_encoder_disable()
139 mdp5_ctl_commit(ctl, pipeline, mdp_ctl_flush_mask_encoder(intf), true); in mdp5_vid_encoder_disable()
160 struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); in mdp5_vid_encoder_enable() local
170 mdp5_ctl_commit(ctl, pipeline, mdp_ctl_flush_mask_encoder(intf), true); in mdp5_vid_encoder_enable()
172 mdp5_ctl_set_encoder_state(ctl, pipeline, true); in mdp5_vid_encoder_enable()
226 mdp5_cstate->pipeline.intf = intf; in mdp5_encoder_atomic_check()
/linux/Documentation/gpu/
H A Dkomeda-kms.rst15 architecture. A display pipeline is made up of multiple individual and
16 functional pipeline stages called components, and every component has some
17 specific capabilities that can give the flowed pipeline pixel data a
24 Layer is the first pipeline stage, which prepares the pixel data for the next
58 Final stage of display pipeline, Timing controller is not for the pixel
94 Single pipeline data flow
98 :alt: Single pipeline digraph
99 :caption: Single pipeline data flow
140 Dual pipeline with Slave enabled
144 :alt: Slave pipeline digraph
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/linux/sound/soc/sof/intel/
H A Dhda-dai-ops.c129 struct sof_ipc4_pipeline *pipeline; in hda_ipc4_get_hext_stream()
136 pipeline = pipe_widget->private; in hda_ipc4_get_hext_stream()
138 /* mark pipeline so that it can be skipped during FE trigger */ in hda_ipc4_get_hext_stream()
139 pipeline->skip_during_fe_trigger = true; in hda_ipc4_get_hext_stream()
300 struct sof_ipc4_pipeline *pipeline; in hda_ipc4_pre_trigger()
308 pipeline = pipe_widget->private; in hda_ipc4_pre_trigger()
327 pipeline->state = SOF_IPC4_PIPE_PAUSED; in hda_ipc4_pre_trigger()
377 struct sof_ipc4_pipeline *pipeline; in hda_ipc4_post_trigger()
385 pipeline = pipe_widget->private; in hda_ipc4_post_trigger()
394 if (pipeline in hda_ipc4_post_trigger()
130 struct sof_ipc4_pipeline *pipeline; hda_ipc4_get_hext_stream() local
301 struct sof_ipc4_pipeline *pipeline; hda_ipc4_pre_trigger() local
378 struct sof_ipc4_pipeline *pipeline; hda_ipc4_post_trigger() local
627 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; hda_select_dai_widget_ops() local
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/linux/sound/soc/sof/
H A Dipc4-topology.c580 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_update_card_components_string() local
591 if (!pipeline->use_chain_dma) in sof_ipc4_update_card_components_string()
681 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_widget_setup_pcm() local
683 sps->dsp_max_burst_size_in_ms = pipeline->use_chain_dma ? in sof_ipc4_widget_setup_pcm()
757 struct sof_ipc4_pipeline *pipeline; in sof_ipc4_widget_setup_comp_dai() local
797 pipeline = pipe_widget->private; in sof_ipc4_widget_setup_comp_dai()
799 if (pipeline->use_chain_dma && in sof_ipc4_widget_setup_comp_dai()
930 struct sof_ipc4_pipeline *pipeline; in sof_ipc4_widget_setup_comp_pipeline() local
934 pipeline = kzalloc_obj(*pipeline); in sof_ipc4_widget_setup_comp_pipeline()
935 if (!pipeline) in sof_ipc4_widget_setup_comp_pipeline()
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H A Dipc4-pcm.c148 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_add_pipeline_by_priority() local
153 if (ascend && pipeline->priority < pipe_priority[i]) in sof_ipc4_add_pipeline_by_priority()
156 else if (!ascend && pipeline->priority > pipe_priority[i]) in sof_ipc4_add_pipeline_by_priority()
167 pipe_priority[i] = pipeline->priority; in sof_ipc4_add_pipeline_by_priority()
177 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_add_pipeline_to_trigger_list() local
179 if (pipeline->skip_during_fe_trigger && state != SOF_IPC4_PIPE_RESET) in sof_ipc4_add_pipeline_to_trigger_list()
215 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_update_pipeline_state() local
218 if (pipeline->skip_during_fe_trigger && state != SOF_IPC4_PIPE_RESET) in sof_ipc4_update_pipeline_state()
224 pipeline->state = state; in sof_ipc4_update_pipeline_state()
371 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_chain_dma_trigger() local
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H A Dipc3-topology.c523 struct sof_ipc_pipe_new *pipeline; in sof_ipc3_widget_setup_comp_pipeline() local
527 pipeline = kzalloc_obj(*pipeline); in sof_ipc3_widget_setup_comp_pipeline()
528 if (!pipeline) in sof_ipc3_widget_setup_comp_pipeline()
532 pipeline->hdr.size = sizeof(*pipeline); in sof_ipc3_widget_setup_comp_pipeline()
533 pipeline->hdr.cmd = SOF_IPC_GLB_TPLG_MSG | SOF_IPC_TPLG_PIPE_NEW; in sof_ipc3_widget_setup_comp_pipeline()
534 pipeline->pipeline_id = swidget->pipeline_id; in sof_ipc3_widget_setup_comp_pipeline()
535 pipeline->comp_id = swidget->comp_id; in sof_ipc3_widget_setup_comp_pipeline()
537 swidget->private = pipeline; in sof_ipc3_widget_setup_comp_pipeline()
548 pipeline->sched_id = comp_swidget->comp_id; in sof_ipc3_widget_setup_comp_pipeline()
551 ret = sof_update_ipc_object(scomp, pipeline, SOF_SCHED_TOKENS, swidget->tuples, in sof_ipc3_widget_setup_comp_pipeline()
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/linux/drivers/staging/media/atomisp/pci/runtime/binary/src/
H A Dbinary.c73 + info->pipeline.left_cropping + binary_dvs_env.width; in ia_css_binary_internal_res()
75 + info->pipeline.top_cropping + binary_dvs_env.height; in ia_css_binary_internal_res()
94 info->pipeline.left_cropping, info->pipeline.mode, in ia_css_binary_internal_res()
95 info->pipeline.c_subsampling, in ia_css_binary_internal_res()
96 info->output.num_chunks, info->pipeline.pipelining); in ia_css_binary_internal_res()
98 info->pipeline.top_cropping, in ia_css_binary_internal_res()
172 if (need_bds_factor_2_00 && binary->info->sp.pipeline.left_cropping > 0) in ia_css_binary_compute_shading_table_bayer_origin()
396 metrics->mode = info->pipeline.mode; in binary_init_metrics()
492 binary->next = binary_infos[binary->sp.pipeline.mode]; in ia_css_binary_init_infos()
493 binary_infos[binary->sp.pipeline.mode] = binary; in ia_css_binary_init_infos()
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/linux/Documentation/gpu/rfc/
H A Dcolor_pipeline.rst112 via the NEXT property of a drm_colorop to constitute a color pipeline.
137 as the entire pipeline can get bypassed by setting the COLOR_PIPELINE on
140 NEXT: The ID of the next drm_colorop in a color pipeline, or 0 if this
192 first drm_colorop in a pipeline. A driver can create and advertise none,
194 pipeline by setting the COLOR PIPELINE to the respective value.
199 Discovery, described below, instead of hard-coding color pipeline
209 or COLOR_ENCODING functionality when the color pipeline client cap is
210 set, they are expected to expose colorops in the pipeline to allow for
231 3. for each enum value walk the color pipeline (via the NEXT pointers)
236 discovery it does not need to reject the entire color pipeline outright,
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/linux/tools/testing/selftests/kvm/lib/
H A Dassert.c30 const char *pipeline = "|cat -n 1>&2"; in test_dump_stack() local
31 char cmd[strlen(addr2line) + strlen(pipeline) + in test_dump_stack()
54 c += sprintf(c, "%s", pipeline); in test_dump_stack()
/linux/drivers/staging/media/atomisp/
H A Dnotes.txt5 pipeline. It does not have its own memory, but instead uses main memory.
14 The actual processing pipeline is made by loading one or more programs,
25 So in this case a single binary handles the entire pipeline.
29 on the ISP can do multiple processing steps in a single pipeline
/linux/drivers/staging/media/atomisp/pci/
H A Dsh_css_param_shading.c256 left_cropping = (binary->info->sp.pipeline.left_cropping == 0) ? in prepare_shading_table()
261 left_padding = (left_padding + binary->info->sp.pipeline.left_cropping) * in prepare_shading_table()
263 binary->info->sp.pipeline.left_cropping; in prepare_shading_table()
267 top_padding = binary->info->sp.pipeline.top_cropping * bds.numerator / in prepare_shading_table()
269 binary->info->sp.pipeline.top_cropping; in prepare_shading_table()
H A Dsh_css_params.c873 struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe); in ia_css_process_kernel() local
877 for (stage = pipeline->stages; stage; stage = stage->next) { in ia_css_process_kernel()
879 process(pipeline->pipe_id, stage, params); in ia_css_process_kernel()
3087 struct ia_css_pipeline *pipeline; in sh_css_param_update_isp_params() local
3093 pipeline = ia_css_pipe_get_pipeline(pipe); in sh_css_param_update_isp_params()
3107 cur_map = &params->pipe_ddr_ptrs[pipeline->pipe_id]; in sh_css_param_update_isp_params()
3108 cur_map_size = &params->pipe_ddr_ptrs_size[pipeline->pipe_id]; in sh_css_param_update_isp_params()
3119 pipeline->stages); in sh_css_param_update_isp_params()
3133 for (stage = pipeline->stages; stage; stage = stage->next) { in sh_css_param_update_isp_params()
3139 process_kernel_parameters(pipeline->pipe_id, in sh_css_param_update_isp_params()
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/linux/Documentation/driver-api/media/
H A Dmc-core.rst24 in a System-on-Chip image processing pipeline), DMA channels or physical
199 A media pipeline is a set of media streams which are interdependent. This
202 due to the software design. Most commonly a media pipeline consists of a single
205 When starting streaming, drivers must notify all entities in the pipeline to
209 The function will mark all the pads which are part of the pipeline as streaming.
212 stored in every pad in the pipeline. Drivers should embed the struct
213 media_pipeline in higher-level pipeline structures and can then access the
214 pipeline through the struct media_pad pipe field.
217 The pipeline pointer must be identical for all nested calls to the function.
244 for any entity which has sink pads in the pipeline. The
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/linux/Documentation/admin-guide/media/
H A Dqcom_camss.rst38 - 1 / 2 VFE (Video Front End) module(s). Contain a pipeline of image processing
40 interface feeds the input data to the image processing pipeline. The image
41 processing pipeline contains also a scale and crop module at the end. Three
43 pipeline. The VFE also contains the AXI bus interface which writes the output
137 The media controller pipeline graph is as follows (with connected two / three
146 Media pipeline graph 8x16
152 Media pipeline graph 8x96
H A Dimx7.rst68 inherit controls from the active entities in the current pipeline, so controls
77 CSI-2 receiver. The following example configures a video capture pipeline with
88 # Configure pads for pipeline
162 The following example configures a video capture pipeline with an output
171 # Configure pads for pipeline
H A Dvimc.rst18 :alt: Diagram of the default media pipeline topology
21 Media pipeline graph on vimc
28 configuration on each linked subdevice to stream frames through the pipeline.
/linux/drivers/staging/media/imx/
H A DTODO7 pipeline. The controls for each capture device are updated in the
8 link_notify callback when the pipeline is modified. This feature should be
/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,video.txt7 Xilinx video IP pipeline processes video streams through one or more Xilinx
10 node of the VIPP represents as a top level node of the pipeline and defines
H A Dvideo.txt6 creating a video pipeline.
12 The whole pipeline is represented by an AMBA bus child node in the device
/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_pipeline.c160 return komeda_pipeline_get_first_component(c->pipeline, avail_inputs); in komeda_component_pickup_input()
209 c->pipeline = pipe; in komeda_component_add()
276 struct komeda_pipeline *pipe = c->pipeline; in komeda_component_verify_inputs()
343 return slave ? slave->pipeline : NULL; in komeda_pipeline_get_slave()

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