| /linux/sound/pci/echoaudio/ |
| H A D | echoaudio_dsp.c | 766 static void set_audio_format(struct echoaudio *chip, u16 pipe_index, in set_audio_format() argument
834 "set_audio_format[%d] = %x\n", pipe_index, dsp_format); in set_audio_format()
835 chip->comm_page->audio_format[pipe_index] = cpu_to_le16(dsp_format); in set_audio_format()
922 static inline int is_pipe_allocated(struct echoaudio *chip, u16 pipe_index) in is_pipe_allocated() argument
924 return (chip->pipe_alloc_mask & (1 << pipe_index)); in is_pipe_allocated()
1040 int pipe_index, int interleave) in allocate_pipes() argument
1046 "allocate_pipes: ch=%d int=%d\n", pipe_index, interleave); in allocate_pipes()
1052 channel_mask |= 1 << (pipe_index + i); in allocate_pipes()
1059 chip->comm_page->position[pipe_index] = 0; in allocate_pipes()
1063 pipe->index = pipe_index; in allocate_pipes()
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| H A D | echoaudio.c | 522 int pipe_index, int interleave) in init_engine() argument
542 err = allocate_pipes(chip, pipe, pipe_index, interleave); in init_engine()
545 pipe_index, err); in init_engine()
549 dev_dbg(chip->card->dev, "allocate_pipes()=%d\n", pipe_index); in init_engine()
594 chip->substream[pipe_index] = substream; in init_engine()
677 int pipe_index = ((struct audiopipe *)runtime->private_data)->index; in pcm_prepare() local
707 if (snd_BUG_ON(pipe_index >= px_num(chip))) in pcm_prepare()
717 if (snd_BUG_ON(!is_pipe_allocated(chip, pipe_index))) in pcm_prepare()
720 set_audio_format(chip, pipe_index, &format); in pcm_prepare()
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| /linux/drivers/media/platform/renesas/vsp1/ |
| H A D | vsp1_video.h | 42 unsigned int pipe_index; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/ |
| H A D | dml2_pmo_dcn6_stage_optimizers.c | 1398 unsigned int pipe_index; in find_shift_for_valid_cache_id_assignment() local
1415 for (pipe_index = 0; pipe_index < pipe_count; pipe_index++) { in find_shift_for_valid_cache_id_assignment()
1417 pipe_vp_startx[pipe_index], pipe_vp_endx[pipe_index], NULL, NULL)) { in find_shift_for_valid_cache_id_assignment()
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| /linux/fs/ |
| H A D | pipe.c | 307 union pipe_index idx = { .head_tail = READ_ONCE(pipe->head_tail) }; in pipe_readable()
499 union pipe_index idx = { .head_tail = READ_ONCE(pipe->head_tail) }; in pipe_writable()
738 union pipe_index idx; in pipe_poll()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn5_funcs_mode_programming.c | 1444 …_core_internal_display_mode_lib *mode_lib, union dml2_global_sync_programming *out, int pipe_index) in dcn5_get_global_sync_programming() argument
1446 …out->dcn4x.vready_offset_pixels = mode_lib->mp.VReadyOffsetPix[mode_lib->mp.pipe_plane[pipe_index]… in dcn5_get_global_sync_programming()
1447 out->dcn4x.vstartup_lines = mode_lib->mp.VStartup[mode_lib->mp.pipe_plane[pipe_index]]; in dcn5_get_global_sync_programming()
1448 …->dcn4x.vupdate_offset_pixels = mode_lib->mp.VUpdateOffsetPix[mode_lib->mp.pipe_plane[pipe_index]]; in dcn5_get_global_sync_programming()
1449 …x.vupdate_vupdate_width_pixels = mode_lib->mp.VUpdateWidthPix[mode_lib->mp.pipe_plane[pipe_index]]; in dcn5_get_global_sync_programming()
1450 …e_keepout_start_lines = mode_lib->mp.pstate_keepout_dst_lines[mode_lib->mp.pipe_plane[pipe_index]]; in dcn5_get_global_sync_programming()
1453 …_core_internal_display_mode_lib *mode_lib, struct dml2_per_stream_programming *out, int pipe_index) in dcn5_get_stream_programming() argument
1455 dcn5_get_global_sync_programming(mode_lib, &out->global_sync, pipe_index); in dcn5_get_stream_programming()
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| H A D | dml2_core_dcn6_calcs_dchub.c | 1031 struct dml2_dchub_per_pipe_register_set *out, int pipe_index, in dcn6_get_pipe_regs() argument
1035 dcn5_rq_dlg_get_rq_reg(&out->rq_regs, display_cfg, mode_lib, pipe_index); in dcn6_get_pipe_regs()
1036 …dcn6_rq_dlg_get_dlg_reg(s, &out->dlg_regs, &out->ttu_regs, display_cfg, mode_lib, pipe_index, utm_… in dcn6_get_pipe_regs()
1037 …out->det_size = mode_lib->mp.DETBufferSizeInKByte[mode_lib->mp.pipe_plane[pipe_index]] / mode_lib-… in dcn6_get_pipe_regs()
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| H A D | dml2_core_dcn5_calcs_dchub.c | 5865 struct dml2_dchub_per_pipe_register_set *out, int pipe_index, in dcn5_get_pipe_regs() argument
5869 dcn5_rq_dlg_get_rq_reg(&out->rq_regs, display_cfg, mode_lib, pipe_index); in dcn5_get_pipe_regs()
5870 …dcn5_rq_dlg_get_dlg_reg(s, &out->dlg_regs, &out->ttu_regs, display_cfg, mode_lib, pipe_index, utm_… in dcn5_get_pipe_regs()
5871 …out->det_size = mode_lib->mp.DETBufferSizeInKByte[mode_lib->mp.pipe_plane[pipe_index]] / mode_lib-… in dcn5_get_pipe_regs()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_translation_helper.c | 1209 unsigned int pipe_index = 0; in dml2_populate_pipe_to_plane_index_mapping() local
1225 pipe_index = pipe->pipe_idx; in dml2_populate_pipe_to_plane_index_mapping()
1227 …if (pipe->stream && dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] == false… in dml2_populate_pipe_to_plane_index_mapping()
1228 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index[pipe_index] = plane_index; in dml2_populate_pipe_to_plane_index_mapping()
1230 dml_to_dc_pipe_mapping->dml_pipe_idx_to_plane_index_valid[pipe_index] = true; in dml2_populate_pipe_to_plane_index_mapping()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_mes.h | 192 u32 pipe_index: 4; // pipe index member
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| H A D | amdgpu_gfx.c | 2396 pipe = hqd_info[i].pipe_index; in amdgpu_gfx_reset_mes_compute()
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