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Searched refs:pipe_bpp (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp.c1224 int intel_dp_output_format_link_bpp_x16(enum intel_output_format output_format, int pipe_bpp) in intel_dp_output_format_link_bpp_x16() argument
1232 pipe_bpp /= 2; in intel_dp_output_format_link_bpp_x16()
1234 return fxp_q4_from_int(pipe_bpp); in intel_dp_output_format_link_bpp_x16()
1512 int pipe_bpp; in intel_dp_mode_valid() local
1523 pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX); in intel_dp_mode_valid()
1544 output_format, pipe_bpp, in intel_dp_mode_valid()
1867 pipe_config->pipe_bpp = bpp; in intel_dp_compute_link_config_wide()
2266 int pipe_bpp, int max_bpp_x16) in align_max_compressed_bpp_x16() argument
2269 int link_bpp_x16 = intel_dp_output_format_link_bpp_x16(output_format, pipe_bpp); in align_max_compressed_bpp_x16()
2291 int pipe_bpp) in dsc_compute_compressed_bpp() argument
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H A Dintel_lvds.c302 if (crtc_state->dither && crtc_state->pipe_bpp == 18) in intel_pre_enable_lvds()
447 if (lvds_bpp != crtc_state->pipe_bpp && !crtc_state->bw_constrained) { in intel_lvds_compute_config()
450 crtc_state->pipe_bpp, lvds_bpp); in intel_lvds_compute_config()
451 crtc_state->pipe_bpp = lvds_bpp; in intel_lvds_compute_config()
H A Dintel_display.c2996 if (crtc_state->dither && crtc_state->pipe_bpp != 30) in i9xx_set_pipeconf()
3000 switch (crtc_state->pipe_bpp) { in i9xx_set_pipeconf()
3003 MISSING_CASE(crtc_state->pipe_bpp); in i9xx_set_pipeconf()
3096 pipe_config->pipe_bpp = 18; in i9xx_get_pipe_config()
3099 pipe_config->pipe_bpp = 24; in i9xx_get_pipe_config()
3102 pipe_config->pipe_bpp = 30; in i9xx_get_pipe_config()
3188 switch (crtc_state->pipe_bpp) { in ilk_set_pipeconf()
3191 MISSING_CASE(crtc_state->pipe_bpp); in ilk_set_pipeconf()
3276 switch (crtc_state->pipe_bpp) { in bdw_set_pipe_misc()
3292 MISSING_CASE(crtc_state->pipe_bpp); in bdw_set_pipe_misc()
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H A Dicl_dsi.c1585 pipe_config->pipe_bpp = bdw_get_pipe_misc_bpp(crtc); in gen11_dsi_get_config()
1630 if (crtc_state->pipe_bpp < 8 * 3) in gen11_dsi_dsc_compute_config()
1691 pipe_config->pipe_bpp = 24; in gen11_dsi_compute_config()
1693 pipe_config->pipe_bpp = 18; in gen11_dsi_compute_config()
H A Dintel_vdsc.c369 vdsc_cfg->bits_per_component = pipe_config->pipe_bpp / 3; in intel_dsc_compute_params()
H A Dintel_psr.c1625 max_bpp = crtc_state->pipe_bpp; in intel_psr2_config_valid()
1640 if (crtc_state->pipe_bpp > max_bpp) { in intel_psr2_config_valid()
1643 crtc_state->pipe_bpp, max_bpp); in intel_psr2_config_valid()
H A Dg4x_dp.c405 intel_edp_fixup_vbt_bpp(encoder, pipe_config->pipe_bpp); in intel_dp_get_config()
H A Dintel_display_types.h1167 int pipe_bpp; /* in 1 bpp units */ member
H A Dintel_tv.c1217 pipe_config->pipe_bpp = 8*3; in intel_tv_compute_config()
H A Dintel_sdvo.c1376 pipe_config->pipe_bpp = 8*3; in intel_sdvo_compute_config()