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Searched refs:pin (Results 1 – 25 of 1392) sorted by relevance

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/linux/drivers/media/cec/core/
H A Dcec-pin.c112 static void cec_pin_update(struct cec_pin *pin, bool v, bool force) in cec_pin_update() argument
114 if (!force && v == pin->adap->cec_pin_is_high) in cec_pin_update()
117 pin->adap->cec_pin_is_high = v; in cec_pin_update()
118 if (atomic_read(&pin->work_pin_num_events) < CEC_NUM_PIN_EVENTS) { in cec_pin_update()
121 if (pin->work_pin_events_dropped) { in cec_pin_update()
122 pin->work_pin_events_dropped = false; in cec_pin_update()
125 pin->work_pin_events[pin->work_pin_events_wr] = ev; in cec_pin_update()
126 pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get(); in cec_pin_update()
127 pin->work_pin_events_wr = in cec_pin_update()
128 (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS; in cec_pin_update()
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3_lcd.dtsi60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
H A Dat91sam9x5_lcd.dtsi63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
/linux/drivers/pinctrl/renesas/
H A Dpinctrl-rza1.c83 u8 pin: 4; member
100 u16 pin: 4; member
127 { .pin = 0, .func = 1 },
128 { .pin = 1, .func = 1 },
129 { .pin = 2, .func = 1 },
130 { .pin = 3, .func = 1 },
131 { .pin = 4, .func = 1 },
132 { .pin = 5, .func = 1 },
133 { .pin = 6, .func = 1 },
134 { .pin = 7, .func = 1 },
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7870-pinctrl.dtsi3 * Samsung Exynos7870 SoC pin-mux and pin-config device tree source
81 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
82 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
83 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
84 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
89 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
90 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_INPUT>;
91 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
92 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
97 samsung,pin-function = <EXYNOS_PIN_FUNC_6>;
[all …]
H A Dexynosautov9-pinctrl.dtsi3 * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source
7 * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as
42 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
47 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
60 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
61 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
66 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
67 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
106 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
107 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
[all …]
H A Dexynos7885-pinctrl.dtsi3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as
84 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
85 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
90 samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
91 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
96 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
97 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
98 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
99 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
[all …]
H A Dexynosautov920-pinctrl.dtsi3 * Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source
7 * Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as
182 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
183 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
184 samsung,pin-con-pdn = <EXYNOS_PIN_PULL_NONE>;
189 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
190 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
191 samsung,pin-con-pdn = <EXYNOS_PIN_PULL_DOWN>;
196 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
197 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos5433-pinctrl.dtsi3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
15 pin- ## _pin { \
17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
143 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
144 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
145 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
150 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
[all …]
H A Dexynos7-pinctrl.dtsi3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
189 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>;
196 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>;
203 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos850-pinctrl.dtsi3 * Samsung's Exynos850 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device
108 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
109 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
110 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
116 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
117 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
118 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
124 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
125 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210-pinctrl.dtsi3 * Samsung's S5PV210 SoC device tree source - pin control-related
11 * Samsung's S5PV210 SoC pin banks, pin-mux and pin-config options are
18 pin- ## _pin { \
20 samsung,pin-con-pdn = <S5PV210_PIN_PDN_ ##_mode>; \
21 samsung,pin-pud-pdn = <S5PV210_PIN_PULL_ ##_pull>; \
279 samsung,pin-function = <S5PV210_PIN_FUNC_2>;
280 samsung,pin-pud = <S5PV210_PIN_PULL_NONE>;
281 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
286 samsung,pin-function = <S5PV210_PIN_FUNC_2>;
287 samsung,pin-pud = <S5PV210_PIN_PULL_NONE>;
[all …]
H A Dexynos4x12-pinctrl.dtsi3 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4x12 SoCs pin-mux and pin-config options are listed as device
15 pin- ## _pin { \
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
128 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
129 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
135 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
136 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos4210-pinctrl.dtsi3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
10 * Samsung's Exynos4210 SoC pin-mux and pin-config options are listed as device
147 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
148 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
155 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
161 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
162 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos5420-pinctrl.dtsi3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
63 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
65 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
70 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
72 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
162 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
163 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos5250-pinctrl.dtsi3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config options are listed as device
202 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
216 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos3250-pinctrl.dtsi3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config options are listed as device
15 pin- ## _pin { \
17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
23 pin- ## _pin { \
25 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
26 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
88 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
[all …]
H A Ds3c64xx-pinctrl.dtsi4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
136 samsung,pin-function = <S3C64XX_PIN_FUNC_2>;
137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
142 samsung,pin-function = <S3C64XX_PIN_FUNC_2>;
143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
148 samsung,pin-function = <S3C64XX_PIN_FUNC_2>;
149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
154 samsung,pin-function = <S3C64XX_PIN_FUNC_2>;
155 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
[all …]
H A Dexynos5260-pinctrl.dtsi3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
201 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
202 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
203 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
208 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
209 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
210 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
215 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
216 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos5410-pinctrl.dtsi3 * Exynos5410 SoC pin-mux and pin-config device tree source
282 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
283 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
284 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
290 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
291 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
296 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
297 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
298 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
[all …]
/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101-pinctrl.dtsi3 * GS101 SoC pin-mux and pin-config device tree source
120 samsung,pin-function = <GS101_PIN_FUNC_2>;
121 samsung,pin-pud = <GS101_PIN_PULL_NONE>;
126 samsung,pin-function = <GS101_PIN_FUNC_2>;
127 samsung,pin-pud = <GS101_PIN_PULL_NONE>;
132 samsung,pin-function = <GS101_PIN_FUNC_2>;
133 samsung,pin-pud = <GS101_PIN_PULL_NONE>;
138 samsung,pin-function = <GS101_PIN_FUNC_2>;
139 samsung,pin-pud = <GS101_PIN_PULL_NONE>;
140 samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
[all …]
/linux/arch/arm64/boot/dts/tesla/
H A Dfsd-pinctrl.dtsi56 samsung,pin-function = <FSD_PIN_FUNC_2>;
57 samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
58 samsung,pin-drv = <FSD_PIN_DRV_LV4>;
63 samsung,pin-function = <FSD_PIN_FUNC_2>;
64 samsung,pin-pud = <FSD_PIN_PULL_UP>;
65 samsung,pin-drv = <FSD_PIN_DRV_LV4>;
70 samsung,pin-function = <FSD_PIN_FUNC_2>;
71 samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
72 samsung,pin-drv = <FSD_PIN_DRV_LV6>;
77 samsung,pin-function = <FSD_PIN_FUNC_2>;
[all …]
/linux/drivers/pinctrl/aspeed/
H A Dpinmux-aspeed.h594 #define SIG_EXPR_LIST_ALIAS(pin, sig, group) \ argument
596 SIG_EXPR_LIST_SYM(pin, sig)[ARRAY_SIZE(SIG_EXPR_LIST_SYM(sig, group))] \
612 #define SIG_EXPR_LIST_DECL_SESG(pin, sig, func, ...) \ argument
616 SIG_EXPR_LIST_ALIAS(pin, sig, func)
628 #define SIG_EXPR_LIST_DECL_SEMG(pin, sig, group, func, ...) \ argument
632 SIG_EXPR_LIST_ALIAS(pin, sig, group)
644 #define SIG_EXPR_LIST_DECL_DESG(pin, sig, f0, f1) \ argument
648 SIG_EXPR_LIST_ALIAS(pin, sig, f0)
652 #define PIN_EXPRS_SYM(pin) pin_exprs_ ## pin argument
653 #define PIN_EXPRS_PTR(pin) (&PIN_EXPRS_SYM(pin)[0]) argument
[all …]
/linux/drivers/dpll/zl3073x/
H A Ddpll.c30 * struct zl3073x_dpll_pin - DPLL pin
31 * @list: this DPLL pin list entry
32 * @dpll: DPLL the pin is registered to
37 * @dir: pin direction
38 * @id: pin id
39 * @prio: pin priority <0, 14>
43 * @phase_offset: last saved pin phase offset
73 * zl3073x_dpll_is_input_pin - check if the pin is input one
74 * @pin: pin t
78 zl3073x_dpll_is_input_pin(struct zl3073x_dpll_pin * pin) zl3073x_dpll_is_input_pin() argument
90 zl3073x_dpll_is_p_pin(struct zl3073x_dpll_pin * pin) zl3073x_dpll_is_p_pin() argument
101 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_pin_direction_get() local
111 struct zl3073x_dpll_pin *pin; zl3073x_dpll_pin_get_by_ref() local
132 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_esync_get() local
168 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_esync_set() local
201 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_ref_sync_get() local
230 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_ref_sync_set() local
300 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_ffo_get() local
314 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_measured_freq_get() local
330 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_frequency_get() local
348 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_frequency_set() local
395 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_phase_offset_get() local
452 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_phase_adjust_get() local
485 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_phase_adjust_set() local
513 zl3073x_dpll_ref_state_get(struct zl3073x_dpll_pin * pin,enum dpll_pin_state * state) zl3073x_dpll_ref_state_get() argument
555 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_state_on_dpll_get() local
569 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_state_on_dpll_set() local
652 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_prio_get() local
665 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_input_pin_prio_set() local
699 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_output_pin_esync_get() local
756 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_output_pin_esync_set() local
812 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_output_pin_frequency_get() local
828 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_output_pin_frequency_set() local
903 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_output_pin_phase_adjust_get() local
926 struct zl3073x_dpll_pin *pin = pin_priv; zl3073x_dpll_output_pin_phase_adjust_set() local
1151 struct zl3073x_dpll_pin *pin; zl3073x_dpll_mode_set() local
1304 struct zl3073x_dpll_pin *pin; zl3073x_dpll_pin_alloc() local
1324 zl3073x_dpll_pin_free(struct zl3073x_dpll_pin * pin) zl3073x_dpll_pin_free() argument
1341 zl3073x_dpll_pin_register(struct zl3073x_dpll_pin * pin,u32 index) zl3073x_dpll_pin_register() argument
1416 zl3073x_dpll_pin_unregister(struct zl3073x_dpll_pin * pin) zl3073x_dpll_pin_unregister() argument
1448 struct zl3073x_dpll_pin *pin, *next; zl3073x_dpll_pins_unregister() local
1542 struct zl3073x_dpll_pin *pin; zl3073x_dpll_pins_register() local
1651 zl3073x_dpll_pin_phase_offset_check(struct zl3073x_dpll_pin * pin) zl3073x_dpll_pin_phase_offset_check() argument
1711 zl3073x_dpll_pin_ffo_check(struct zl3073x_dpll_pin * pin) zl3073x_dpll_pin_ffo_check() argument
1750 zl3073x_dpll_pin_measured_freq_check(struct zl3073x_dpll_pin * pin) zl3073x_dpll_pin_measured_freq_check() argument
1791 struct zl3073x_dpll_pin *pin; zl3073x_dpll_changes_check() local
1949 zl3073x_dpll_ref_sync_pair_register(struct zl3073x_dpll_pin * pin) zl3073x_dpll_ref_sync_pair_register() argument
2006 struct zl3073x_dpll_pin *pin; zl3073x_dpll_ref_sync_pairs_register() local
[all...]
/linux/arch/arm64/boot/dts/actions/
H A Ds900-bubblegum-96.dts69 * NC = not connected (pin out but not routed from the chip to
71 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
94 "GPIO-A", /* GPIO_0, LSEC pin 23 */
95 "GPIO-B", /* GPIO_1, LSEC pin 24 */
96 "GPIO-C", /* GPIO_2, LSEC pin 25 */
97 "GPIO-D", /* GPIO_3, LSEC pin 26 */
98 "GPIO-E", /* GPIO_4, LSEC pin 27 */
99 "GPIO-F", /* GPIO_5, LSEC pin 28 */
100 "GPIO-G", /* GPIO_6, LSEC pin 29 */
101 "GPIO-H", /* GPIO_7, LSEC pin 30 */
[all …]

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