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Searched refs:pic_width (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c171 if (dsc_cfg->pic_width > dsc20->max_image_width) in dsc2_validate_stream()
303 DC_LOG_DSC("\tpic_width %d", pps->pic_width); in dsc_log_pps()
379 ASSERT(dsc_cfg->pic_width); in dsc_prepare_config()
390 !dsc_cfg->pic_width || !dsc_cfg->pic_height || in dsc_prepare_config()
408 dsc_reg_vals->pps.pic_width = dsc_cfg->pic_width; in dsc_prepare_config()
418 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
543 reg_vals->pps.pic_width = 0; in dsc_init_reg_values()
601 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
650 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
/linux/include/drm/display/
H A Ddrm_dsc.h107 u16 pic_width; member
345 __be16 pic_width; member
/linux/drivers/gpu/drm/amd/display/dc/dsc/
H A Ddc_dsc.c919 int pic_width; in setup_dsc_config() local
932 pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; in setup_dsc_config()
938 if (dsc_sink_caps->branch_max_line_width && dsc_sink_caps->branch_max_line_width < pic_width) in setup_dsc_config()
1011 if (pic_width % max_slices_h == 0) in setup_dsc_config()
1021 min_slices_h = pic_width / dsc_common_caps.max_slice_width; in setup_dsc_config()
1022 if (pic_width % dsc_common_caps.max_slice_width) in setup_dsc_config()
1037 if (pic_width % min_slices_h != 0) in setup_dsc_config()
1095 slice_width = pic_width / num_slices_h; in setup_dsc_config()
H A Drc_calc_dpi.c39 to->pic_width = from->pic_width; in copy_pps_fields()
H A Ddsc.h38 uint32_t pic_width; member
/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc.c272 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; in intel_dsc_compute_params()
273 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, in intel_dsc_compute_params()
477 DSC_PPS2_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances); in intel_dsc_pps_configure()
526 DSC_PPS16_SLICE_PER_LINE((vdsc_cfg->pic_width / num_vdsc_instances) / in intel_dsc_pps_configure()
892 vdsc_cfg->pic_width = REG_FIELD_GET(DSC_PPS2_PIC_WIDTH_MASK, pps_temp) * num_vdsc_instances; in intel_dsc_get_pps_config()
H A Dintel_vdsc_regs.h109 #define DSC_PPS2_PIC_WIDTH(pic_width) REG_FIELD_PREP(DSC_PPS2_PIC_WIDTH_MASK, pic_width) argument
H A Dicl_dsi.c1623 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c145 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); in drm_dsc_pps_payload_pack()
1483 cfg->pic_width, cfg->pic_height, in drm_dsc_dump_config_main_params()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c142 if (dsc_cfg->pic_width > dsc401->max_image_width) in dsc401_validate_stream()
290 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
H A Ddcn314_hwseq.c89 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()
108 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dsc.c76 data = dsc->pic_width << 16; in dpu_hw_dsc_config()
H A Ddpu_encoder.c2031 int pic_width; in dpu_encoder_prep_dsc() local
2046 pic_width = dsc->pic_width; in dpu_encoder_prep_dsc()
2054 this_frame_slices = pic_width / dsc->slice_width; in dpu_encoder_prep_dsc()
/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c956 dsc->pic_width = mode->hdisplay; in dsi_timing_setup()
958 DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height); in dsi_timing_setup()
2486 int pic_width = mode->hdisplay; in msm_dsi_host_check_dsc() local
2492 if (pic_width % dsc->slice_width) { in msm_dsi_host_check_dsc()
2494 pic_width, dsc->slice_width); in msm_dsi_host_check_dsc()
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c825 dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->hblank_borrow + in link_set_dsc_on_stream()
848 dsc_cfg.pic_width *= opp_cnt; in link_set_dsc_on_stream()
957 …dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h… in link_set_dsc_pps_packet()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c354 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()
373 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c1053 dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->hblank_borrow + in dcn32_update_dsc_on_stream()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1661 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left in dcn20_validate_dsc()