Searched refs:pdc_write (Results 1 – 1 of 1) sorted by relevance
| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.c | 663 static inline void pdc_write(void __iomem *ptr, u32 offset, u32 value) in pdc_write() function
745 pdc_write(seqptr, REG_A6XX_PDC_GPU_SEQ_MEM_0, 0xfebea1e1); in a6xx_gmu_rpmh_init()
746 pdc_write(seqptr, REG_A6XX_PDC_GPU_SEQ_MEM_0 + 1, 0xa5a4a3a2); in a6xx_gmu_rpmh_init()
747 pdc_write(seqptr, REG_A6XX_PDC_GPU_SEQ_MEM_0 + 2, 0x8382a6e0); in a6xx_gmu_rpmh_init()
748 pdc_write(seqptr, REG_A6XX_PDC_GPU_SEQ_MEM_0 + 3, 0xbce3e284); in a6xx_gmu_rpmh_init()
749 pdc_write(seqptr, REG_A6XX_PDC_GPU_SEQ_MEM_0 + 4, 0x002081fc); in a6xx_gmu_rpmh_init()
752 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK, 7); in a6xx_gmu_rpmh_init()
753 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD_WAIT_FOR_CMPL_BANK, 0); in a6xx_gmu_rpmh_init()
754 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CONTROL, 0); in a6xx_gmu_rpmh_init()
755 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID, 0x10108); in a6xx_gmu_rpmh_init()
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