Searched refs:pcifn (Results 1 – 10 of 10) sorted by relevance
139 int pcifn = bfa_ioc_pcifn(ioc); in bfa_ioc_cb_reg_init() local143 ioc->ioc_regs.hfn_mbox = rb + iocreg_fnreg[pcifn].hfn_mbox; in bfa_ioc_cb_reg_init()144 ioc->ioc_regs.lpu_mbox = rb + iocreg_fnreg[pcifn].lpu_mbox; in bfa_ioc_cb_reg_init()145 ioc->ioc_regs.host_page_num_fn = rb + iocreg_fnreg[pcifn].hfn_pgn; in bfa_ioc_cb_reg_init()160 ioc->ioc_regs.hfn_mbox_cmd = rb + iocreg_mbcmd[pcifn].hfn; in bfa_ioc_cb_reg_init()161 ioc->ioc_regs.lpu_mbox_cmd = rb + iocreg_mbcmd[pcifn].lpu; in bfa_ioc_cb_reg_init()
186 int pcifn = bfa_ioc_pcifn(ioc); in bfa_ioc_ct_reg_init() local190 ioc->ioc_regs.hfn_mbox = rb + ct_fnreg[pcifn].hfn_mbox; in bfa_ioc_ct_reg_init()191 ioc->ioc_regs.lpu_mbox = rb + ct_fnreg[pcifn].lpu_mbox; in bfa_ioc_ct_reg_init()192 ioc->ioc_regs.host_page_num_fn = rb + ct_fnreg[pcifn].hfn_pgn; in bfa_ioc_ct_reg_init()198 ioc->ioc_regs.hfn_mbox_cmd = rb + ct_p0reg[pcifn].hfn; in bfa_ioc_ct_reg_init()199 ioc->ioc_regs.lpu_mbox_cmd = rb + ct_p0reg[pcifn].lpu; in bfa_ioc_ct_reg_init()206 ioc->ioc_regs.hfn_mbox_cmd = rb + ct_p1reg[pcifn].hfn; in bfa_ioc_ct_reg_init()207 ioc->ioc_regs.lpu_mbox_cmd = rb + ct_p1reg[pcifn].lpu; in bfa_ioc_ct_reg_init()
328 u32 pcifn; /* PCI device function */ member
762 bfad->pci_attr.pcifn = PCI_FUNC(pdev->devfn); in bfad_pci_init()
504 #define XG_LINK_STATE_P3P(pcifn, val) \ argument505 (((val) >> ((pcifn) * 4)) & XG_LINK_STATE_P3P_MASK)509 #define P3P_LINK_SPEED_REG(pcifn) \ argument510 (CRB_PF_LINK_SPEED_1 + (((pcifn) / 4) * 4))511 #define P3P_LINK_SPEED_VAL(pcifn, reg) \ argument512 (((reg) >> (8 * ((pcifn) & 0x3))) & P3P_LINK_SPEED_MASK)
252 int pcifn = bfa_ioc_pcifn(ioc); in bfa_ioc_ct_reg_init() local256 ioc->ioc_regs.hfn_mbox = rb + ct_fnreg[pcifn].hfn_mbox; in bfa_ioc_ct_reg_init()257 ioc->ioc_regs.lpu_mbox = rb + ct_fnreg[pcifn].lpu_mbox; in bfa_ioc_ct_reg_init()258 ioc->ioc_regs.host_page_num_fn = rb + ct_fnreg[pcifn].hfn_pgn; in bfa_ioc_ct_reg_init()264 ioc->ioc_regs.hfn_mbox_cmd = rb + ct_p0reg[pcifn].hfn; in bfa_ioc_ct_reg_init()265 ioc->ioc_regs.lpu_mbox_cmd = rb + ct_p0reg[pcifn].lpu; in bfa_ioc_ct_reg_init()272 ioc->ioc_regs.hfn_mbox_cmd = rb + ct_p1reg[pcifn].hfn; in bfa_ioc_ct_reg_init()273 ioc->ioc_regs.lpu_mbox_cmd = rb + ct_p1reg[pcifn].lpu; in bfa_ioc_ct_reg_init()
88 u32 pcifn; /*!< PCI device function */ member
2915 ioc_attr->pci_attr.pcifn = bfa_ioc_pcifn(ioc); in bfa_nw_ioc_get_attr()
696 #define XG_LINK_STATE_P3(pcifn,val) \ argument697 (((val) >> ((pcifn) * 4)) & XG_LINK_STATE_P3_MASK)701 #define P3_LINK_SPEED_REG(pcifn) \ argument702 (CRB_PF_LINK_SPEED_1 + (((pcifn) / 4) * 4))703 #define P3_LINK_SPEED_VAL(pcifn, reg) \ argument704 (((reg) >> (8 * ((pcifn) & 0x3))) & P3_LINK_SPEED_MASK)
688 #define NX_CDRP_SIGNATURE_MAKE(pcifn, version) \ argument689 (((pcifn) & 0xff) | (((version) & 0xff) << 8) | (0xcafe << 16))