Searched refs:p_rate (Results 1 – 5 of 5) sorted by relevance
| /linux/arch/arm/mach-omap1/ |
| H A D | clock.h | 84 unsigned long p_rate);
86 unsigned long *p_rate);
96 unsigned long followparent_recalc(struct omap1_clk *clk, unsigned long p_rate);
97 unsigned long omap_fixed_divisor_recalc(struct omap1_clk *clk, unsigned long p_rate);
103 unsigned long omap1_ckctl_recalc(struct omap1_clk *clk, unsigned long p_rate);
104 long omap1_round_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long *p_rate);
105 int omap1_set_sossi_rate(struct omap1_clk *clk, unsigned long rate, unsigned long p_rate);
106 unsigned long omap1_sossi_recalc(struct omap1_clk *clk, unsigned long p_rate);
107 unsigned long omap1_ckctl_recalc_dsp_domain(struct omap1_clk *clk, unsigned long p_rate);
109 unsigned long p_rate);
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| /linux/drivers/clk/rockchip/ |
| H A D | clk.c | 186 unsigned long p_rate, p_parent_rate; in rockchip_fractional_approximation() local
189 p_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); in rockchip_fractional_approximation()
190 if ((rate * 20 > p_rate) && (p_rate % rate != 0)) { in rockchip_fractional_approximation()
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| /linux/drivers/clk/qcom/ |
| H A D | clk-pll.c | 141 clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long p_rate) in clk_pll_set_rate() argument
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| /linux/drivers/clk/tegra/ |
| H A D | clk-tegra210.c | 1485 unsigned long cf, p_rate; in tegra210_pll_fixed_mdiv_cfg() local
1507 p_rate = rate * p; in tegra210_pll_fixed_mdiv_cfg()
1508 if (p_rate > params->vco_max) in tegra210_pll_fixed_mdiv_cfg()
1509 p_rate = params->vco_max; in tegra210_pll_fixed_mdiv_cfg()
1511 cfg->n = p_rate / cf; in tegra210_pll_fixed_mdiv_cfg()
1516 unsigned long rem = p_rate - cf * cfg->n; in tegra210_pll_fixed_mdiv_cfg()
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| /linux/drivers/clk/ |
| H A D | clk.c | 2860 unsigned long p_rate = 0; in clk_core_set_parent_nolock() local
2889 p_rate = parent->rate; in clk_core_set_parent_nolock()
2897 ret = __clk_speculate_rates(core, p_rate); in clk_core_set_parent_nolock()
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