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Searched refs:out_be32 (Results 1 – 25 of 100) sorted by relevance

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/linux/arch/powerpc/platforms/52xx/
H A Dlite5200_pm.c128 out_be32(&xlb->snoop_window, sxlb.snoop_window); in lite5200_restore_regs()
129 out_be32(&xlb->master_priority, sxlb.master_priority); in lite5200_restore_regs()
130 out_be32(&xlb->master_pri_enable, sxlb.master_pri_enable); in lite5200_restore_regs()
133 out_be32(&xlb->int_enable, sxlb.int_enable); in lite5200_restore_regs()
134 out_be32(&xlb->config, sxlb.config); in lite5200_restore_regs()
145 out_be32(&cdm->clk_enables, scdm.clk_enables); in lite5200_restore_regs()
156 out_be32(&bes->taskBar, sbes.taskBar); in lite5200_restore_regs()
157 out_be32(&bes->currentPointer, sbes.currentPointer); in lite5200_restore_regs()
158 out_be32(&bes->endPointer, sbes.endPointer); in lite5200_restore_regs()
159 out_be32(&bes->variablePointer, sbes.variablePointer); in lite5200_restore_regs()
[all …]
H A Dmpc52xx_pci.c118 out_be32(hose->cfg_addr, in mpc52xx_pci_read_config()
158 out_be32(hose->cfg_addr, 0); in mpc52xx_pci_read_config()
175 out_be32(hose->cfg_addr, in mpc52xx_pci_write_config()
222 out_be32(hose->cfg_addr, 0); in mpc52xx_pci_write_config()
256 out_be32(&pci_regs->scr, tmp); in mpc52xx_pci_setup()
262 out_be32(&pci_regs->iw0btar, in mpc52xx_pci_setup()
275 out_be32(&pci_regs->iw1btar, in mpc52xx_pci_setup()
293 out_be32(&pci_regs->iw2btar, in mpc52xx_pci_setup()
300 out_be32(&pci_regs->iwcr, MPC52xx_PCI_IWCR_PACK(iwcr0, iwcr1, iwcr2)); in mpc52xx_pci_setup()
304 out_be32(&pci_regs->tbatr0, MPC52xx_PCI_TBATR_ENABLE | pci_phys); in mpc52xx_pci_setup()
[all …]
H A Dmpc52xx_pic.c148 out_be32(addr, in_be32(addr) | (1 << bitno)); in io_be_setbit()
153 out_be32(addr, in_be32(addr) & ~(1 << bitno)); in io_be_clrbit()
198 out_be32(&intr->ctrl, ctrl_reg); in mpc52xx_extirq_set_type()
282 out_be32(&sdma->IntPend, 1 << l2irq); in mpc52xx_sdma_ack()
426 out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ in mpc52xx_init_irq()
427 out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ in mpc52xx_init_irq()
428 out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */ in mpc52xx_init_irq()
429 out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */ in mpc52xx_init_irq()
436 out_be32(&intr->ctrl, intr_ctrl); in mpc52xx_init_irq()
439 out_be32(&intr->per_pri1, 0); in mpc52xx_init_irq()
[all …]
H A Dmpc52xx_common.c71 out_be32(&xlb->master_pri_enable, 0xff); in mpc5200_setup_xlb_arbiter()
72 out_be32(&xlb->master_priority, 0x11111111); in mpc5200_setup_xlb_arbiter()
81 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); in mpc5200_setup_xlb_arbiter()
197 out_be32(&mpc52xx_cdm->clk_enables, val | mask); in mpc52xx_set_psc_clkdiv()
214 out_be32(&mpc52xx_wdt->mode, 0x00000000); in mpc52xx_restart()
215 out_be32(&mpc52xx_wdt->count, 0x000000ff); in mpc52xx_restart()
216 out_be32(&mpc52xx_wdt->mode, 0x00009004); in mpc52xx_restart()
274 out_be32(&simple_gpio->port_config, mux & (~gpio)); in mpc5200_psc_ac97_gpio_reset()
298 out_be32(&simple_gpio->port_config, mux); in mpc5200_psc_ac97_gpio_reset()
H A Dlite5200.c115 out_be32(&gpio->port_config, port_config); in lite5200_fix_port_config()
135 out_be32(mbar + 0x1048, in_be32(mbar + 0x1048) & ~0x300); in lite5200_suspend_prepare()
137 out_be32(mbar + 0x1050, 0x00000001); in lite5200_suspend_prepare()
143 out_be32(mbar + 0x1050, 0x00010000); in lite5200_resume_finish()
/linux/arch/powerpc/sysdev/
H A Dfsl_rmu.c215 out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_TE); in fsl_rio_tx_handler()
221 out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_QOI); in fsl_rio_tx_handler()
234 out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_EOMI); in fsl_rio_tx_handler()
260 out_be32((void *)&rmu->msg_regs->isr, RIO_MSG_ISR_TE); in fsl_rio_rx_handler()
277 out_be32(&rmu->msg_regs->isr, RIO_MSG_ISR_DIQI); in fsl_rio_rx_handler()
303 out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_TE); in fsl_rio_dbell_handler()
309 out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_QFI); in fsl_rio_dbell_handler()
355 out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_DIQI); in fsl_rio_dbell_handler()
366 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0); in msg_unit_error_handler()
368 out_be32((u32 *)(rmu_regs_win + RIO_IM0SR), IMSR_CLEAR); in msg_unit_error_handler()
[all …]
H A Dcpm2_pic.c86 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_mask_irq()
98 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_unmask_irq()
109 out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit); in cpm2_ack()
121 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_end_irq()
180 out_be32(&cpm2_intctl->ic_siexr, vnew); in cpm2_set_irq_type()
240 out_be32(&cpm2_intctl->ic_simrh, 0x00000000); in cpm2_pic_init()
241 out_be32(&cpm2_intctl->ic_simrl, 0x00000000); in cpm2_pic_init()
246 out_be32(&cpm2_intctl->ic_sipnrh, 0xffffffff); in cpm2_pic_init()
247 out_be32(&cpm2_intctl->ic_sipnrl, 0xffffffff); in cpm2_pic_init()
258 out_be32(&cpm2_intctl->ic_scprrh, 0x05309770); in cpm2_pic_init()
[all …]
H A Dfsl_rio.c118 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), in fsl_rio_mcheck_exception()
171 out_be32(priv->regs_win + offset, data); in fsl_local_config_write()
210 out_be32(&priv->maint_atmu_regs->rowtar, in fsl_rio_config_read()
212 out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); in fsl_rio_config_read()
275 out_be32(&priv->maint_atmu_regs->rowtar, in fsl_rio_config_write()
277 out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); in fsl_rio_config_write()
288 out_be32((u32 *) data, val); in fsl_rio_config_write()
304 out_be32(&priv->inb_atmu_regs[i].riwar, 0); in fsl_rio_inbound_mem_init()
350 out_be32(&priv->inb_atmu_regs[i].riwtar, lstart >> RIWTAR_TRAD_VAL_SHIFT); in fsl_map_inb_mem()
351 out_be32(&priv->inb_atmu_regs[i].riwbar, rstart >> RIWBAR_BADD_VAL_SHIFT); in fsl_map_inb_mem()
[all …]
H A Dfsl_lbc.c162 out_be32(&fsl_lbc_ctrl_dev->regs->mar, mar); in fsl_upm_run_pattern()
172 out_be32(io_base, 0x0); in fsl_upm_run_pattern()
192 out_be32(&lbc->lteatr, 0); in fsl_lbc_ctrl_init()
193 out_be32(&lbc->ltear, 0); in fsl_lbc_ctrl_init()
194 out_be32(&lbc->lteccr, LTECCR_CLEAR); in fsl_lbc_ctrl_init()
195 out_be32(&lbc->ltedr, LTEDR_ENABLE); in fsl_lbc_ctrl_init()
223 out_be32(&lbc->ltesr, LTESR_CLEAR); in fsl_lbc_ctrl_irq()
224 out_be32(&lbc->lteatr, 0); in fsl_lbc_ctrl_irq()
225 out_be32(&lbc->ltear, 0); in fsl_lbc_ctrl_irq()
336 out_be32(&fsl_lbc_ctrl_dev->regs->lteir, LTEIR_ENABLE); in fsl_lbc_ctrl_probe()
H A Dfsl_pci.c168 out_be32(&pci->pow[index + i].potar, pci_addr >> 12); in setup_one_atmu()
169 out_be32(&pci->pow[index + i].potear, (u64)pci_addr >> 44); in setup_one_atmu()
170 out_be32(&pci->pow[index + i].powbar, phys_addr >> 12); in setup_one_atmu()
171 out_be32(&pci->pow[index + i].powar, flags | (bits - 1)); in setup_one_atmu()
244 out_be32(&pci->pow[i].powar, 0); in setup_pci_atmu()
248 out_be32(&pci->piw[i].piwar, 0); in setup_pci_atmu()
280 out_be32(&pci->pow[j].potar, (hose->io_resource.start >> 12)); in setup_pci_atmu()
281 out_be32(&pci->pow[j].potear, 0); in setup_pci_atmu()
282 out_be32(&pci->pow[j].powbar, (hose->io_base_phys >> 12)); in setup_pci_atmu()
284 out_be32(&pci->pow[j].powar, 0x80088000 in setup_pci_atmu()
[all …]
/linux/arch/powerpc/platforms/8xx/
H A Dm8xx_setup.c71 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY); in mpc8xx_calibrate_decr()
72 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY); in mpc8xx_calibrate_decr()
102 out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, ~KAPWR_KEY); in mpc8xx_calibrate_decr()
103 out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, ~KAPWR_KEY); in mpc8xx_calibrate_decr()
104 out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, ~KAPWR_KEY); in mpc8xx_calibrate_decr()
105 out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, KAPWR_KEY); in mpc8xx_calibrate_decr()
106 out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, KAPWR_KEY); in mpc8xx_calibrate_decr()
107 out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, KAPWR_KEY); in mpc8xx_calibrate_decr()
144 out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, KAPWR_KEY); in mpc8xx_set_rtc_time()
145 out_be32(&mpc8xx_immr->im_sit.sit_rtc, (u32)time); in mpc8xx_set_rtc_time()
[all …]
H A Dpic.c30 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask); in mpc8xx_unmask_irq()
36 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask); in mpc8xx_mask_irq()
41 out_be32(&siu_reg->sc_sipend, mpc8xx_irqd_to_bit(d)); in mpc8xx_ack()
47 out_be32(&siu_reg->sc_simask, mpc8xx_cached_irq_mask); in mpc8xx_end_irq()
56 out_be32(&siu_reg->sc_siel, siel); in mpc8xx_set_irq_type()
/linux/arch/powerpc/platforms/83xx/
H A Dsuspend.c133 out_be32(&pmc_regs->config1, reg_cfg1); in mpc83xx_change_state()
152 out_be32(&pmc_regs->event, event); in pmc_irq_handler()
161 out_be32(&syscr_regs->sicrl, saved_regs.sicrl); in mpc83xx_suspend_restore_regs()
162 out_be32(&syscr_regs->sicrh, saved_regs.sicrh); in mpc83xx_suspend_restore_regs()
163 out_be32(&clock_regs->sccr, saved_regs.sccr); in mpc83xx_suspend_restore_regs()
185 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
194 out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN); in mpc83xx_suspend_enter()
204 out_be32(&pmc_regs->mask, PMCER_ALL); in mpc83xx_suspend_enter()
206 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
214 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
[all …]
/linux/drivers/edac/
H A Dmpc85xx_edac.c58 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); in mpc85xx_pci_check()
77 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); in mpc85xx_pci_check()
107 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); in mpc85xx_pcie_check()
110 out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, err_cap_stat | 0x1); in mpc85xx_pcie_check()
225 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, ~0); in mpc85xx_pci_err_probe()
228 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, 0); in mpc85xx_pci_err_probe()
234 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, 0x40); in mpc85xx_pci_err_probe()
240 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0x40); in mpc85xx_pci_err_probe()
244 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0); in mpc85xx_pci_err_probe()
247 out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, 0x1); in mpc85xx_pci_err_probe()
[all …]
/linux/drivers/mtd/nand/raw/
H A Dfsl_elbc_nand.c167 out_be32(&lbc->fbar, page_addr >> 6); in set_addr()
168 out_be32(&lbc->fpar, in set_addr()
177 out_be32(&lbc->fbar, page_addr >> 5); in set_addr()
178 out_be32(&lbc->fpar, in set_addr()
211 out_be32(&lbc->fmr, priv->fmr | 3); in fsl_elbc_run_command()
213 out_be32(&lbc->mdr, elbc_fcm_ctrl->mdr); in fsl_elbc_run_command()
226 out_be32(&lbc->lsor, priv->bank); in fsl_elbc_run_command()
265 out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */ in fsl_elbc_run_command()
282 out_be32(&lbc->fir, in fsl_elbc_do_read()
289 out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | in fsl_elbc_do_read()
[all …]
/linux/sound/soc/fsl/
H A Dmpc5200_psc_ac97.c47 out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); in psc_ac97_read()
83 out_be32(&psc_dma->psc_regs->ac97_cmd, in psc_ac97_write()
93 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); in psc_ac97_warm_reset()
95 out_be32(&regs->sicr, psc_dma->sicr); in psc_ac97_warm_reset()
108 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB); in psc_ac97_cold_reset()
157 out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000); in psc_ac97_hw_digital_params()
159 out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000); in psc_ac97_hw_digital_params()
177 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); in psc_ac97_trigger()
186 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); in psc_ac97_trigger()
294 out_be32(&regs->sicr, psc_dma->sicr); in psc_ac97_of_probe()
[all …]
H A Dfsl_dma.c260 out_be32(&dma_channel->sr, sr2); in fsl_dma_isr()
433 out_be32(&dma_channel->clndar, in fsl_dma_open()
435 out_be32(&dma_channel->eclndar, in fsl_dma_open()
439 out_be32(&dma_channel->bcr, 0); in fsl_dma_open()
471 out_be32(&dma_channel->mr, mr); in fsl_dma_open()
604 out_be32(&dma_channel->mr, mr); in fsl_dma_hw_params()
740 out_be32(&dma_channel->mr, CCSR_DMA_MR_CA); in fsl_dma_hw_free()
741 out_be32(&dma_channel->mr, 0); in fsl_dma_hw_free()
744 out_be32(&dma_channel->sr, -1); in fsl_dma_hw_free()
745 out_be32( in fsl_dma_hw_free()
[all...]
/linux/arch/powerpc/platforms/512x/
H A Dmpc512x_shared.c36 out_be32(&reset_module_base->rpr, 0x52535445); in mpc512x_restart()
38 out_be32(&reset_module_base->rcr, 0x2); in mpc512x_restart()
263 out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma)); in mpc512x_init_diu()
264 out_be32(&diu_reg->desc[1], 0); in mpc512x_init_diu()
265 out_be32(&diu_reg->desc[2], 0); in mpc512x_init_diu()
266 out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0)); in mpc512x_init_diu()
429 out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size); in mpc512x_psc_fifo_init()
431 out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size); in mpc512x_psc_fifo_init()
435 out_be32(&FIFOC(psc)->txcmd, 0x80); in mpc512x_psc_fifo_init()
436 out_be32(&FIFOC(psc)->txcmd, 0x01); in mpc512x_psc_fifo_init()
[all …]
H A Dmpc512x_lpbfifo.c84 out_be32(&lpbfifo.regs->enable, in mpc512x_lpbfifo_irq()
89 out_be32(&lpbfifo.regs->status, MPC512X_SCLPC_SUCCESS); in mpc512x_lpbfifo_irq()
267 out_be32(&lpbfifo.regs->enable, in mpc512x_lpbfifo_kick()
269 out_be32(&lpbfifo.regs->enable, 0x0); in mpc512x_lpbfifo_kick()
278 out_be32(&lpbfifo.regs->fifo_ctrl, MPC512X_SCLPC_FIFO_CTRL(0x7)); in mpc512x_lpbfifo_kick()
279 out_be32(&lpbfifo.regs->fifo_alarm, MPC512X_SCLPC_FIFO_ALARM(0x200)); in mpc512x_lpbfifo_kick()
285 out_be32(&lpbfifo.regs->start_addr, lpbfifo.req->dev_phys_addr); in mpc512x_lpbfifo_kick()
297 out_be32(&lpbfifo.regs->ctrl, bits); in mpc512x_lpbfifo_kick()
306 out_be32(&lpbfifo.regs->enable, bits); in mpc512x_lpbfifo_kick()
310 out_be32(&lpbfifo.regs->pkt_size, bits); in mpc512x_lpbfifo_kick()
[all …]
/linux/drivers/spi/
H A Dspi-mpc512x-psc.c111 out_be32(psc_addr(mps, sicr), sicr); in mpc512x_psc_spi_activate_cs()
121 out_be32(psc_addr(mps, ccr), ccr); in mpc512x_psc_spi_activate_cs()
186 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); in mpc512x_psc_spi_transfer_rxtx()
187 out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY); in mpc512x_psc_spi_transfer_rxtx()
352 out_be32(&fifo->tximr, 0); in mpc512x_psc_spi_unprep_xfer_hw()
401 out_be32(&fifo->tximr, 0); in mpc512x_psc_spi_port_config()
402 out_be32(&fifo->rximr, 0); in mpc512x_psc_spi_port_config()
414 out_be32(psc_addr(mps, sicr), sicr); in mpc512x_psc_spi_port_config()
421 out_be32(psc_addr(mps, ccr), ccr); in mpc512x_psc_spi_port_config()
428 out_be32(&fifo->rxalarm, 0xfff); in mpc512x_psc_spi_port_config()
[all …]
/linux/arch/powerpc/platforms/cell/spufs/
H A Dhw_ops.c112 out_be32(&prob->spu_mb_W, data); in spu_hw_wbox_write()
126 out_be32(&ctx->spu->problem->signal_notify1, data); in spu_hw_signal1_write()
131 out_be32(&ctx->spu->problem->signal_notify2, data); in spu_hw_signal2_write()
183 out_be32(&ctx->spu->problem->spu_npc_RW, val); in spu_hw_npc_write()
212 out_be32(&ctx->spu->problem->spu_runcntl_RW, val); in spu_hw_runcntl_write()
219 out_be32(&ctx->spu->problem->spu_runcntl_RW, SPU_RUNCNTL_STOP); in spu_hw_runcntl_stop()
257 out_be32(&prob->dma_querymask_RW, mask); in spu_hw_set_mfc_query()
258 out_be32(&prob->dma_querytype_RW, mode); in spu_hw_set_mfc_query()
281 out_be32(&prob->mfc_lsa_W, cmd->lsa); in spu_hw_send_mfc_command()
283 out_be32(&prob->mfc_union_W.by32.mfc_size_tag32, in spu_hw_send_mfc_command()
[all …]
/linux/arch/powerpc/sysdev/ge/
H A Dge_pic.c122 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); in gef_pic_mask()
143 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); in gef_pic_unmask()
201 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0); in gef_pic_init()
202 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_INTR_MASK, 0); in gef_pic_init()
204 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0); in gef_pic_init()
205 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0); in gef_pic_init()
/linux/arch/powerpc/boot/
H A Dcuboot-pq2.c101 out_be32(&ctrl_addr[cs * 2], 0); in update_cs_ranges()
102 out_be32(&ctrl_addr[cs * 2 + 1], in update_cs_ranges()
104 out_be32(&ctrl_addr[cs * 2], base | cs_ranges_buf[i].addr); in update_cs_ranges()
185 out_be32(&pci_regs[1][0], mem_base->phys_addr | 1); in fixup_pci()
186 out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1)); in fixup_pci()
188 out_be32(&pci_regs[1][1], io->phys_addr | 1); in fixup_pci()
189 out_be32(&pci_regs[2][1], ~(io->size[1] - 1)); in fixup_pci()
230 out_be32((u32 *)&soc_regs[0x1002c], 0x01236745); in fixup_pci()
H A Dugecon.c47 out_be32(csr_reg, csr); in ug_io_transaction()
51 out_be32(data_reg, data); in ug_io_transaction()
53 out_be32(cr_reg, cr); in ug_io_transaction()
59 out_be32(csr_reg, 0); in ug_io_transaction()
/linux/drivers/usb/host/
H A Dfhci-tds.c87 out_be32(&ep->empty_td->buf_ptr, DUMMY_BD_BUFFER); in fhci_push_dummy_bd()
213 out_be32(&td->buf_ptr, 0); in fhci_create_ep()
265 out_be32(&ep->ep_pram_ptr->tx_state, 0); in fhci_init_ep_registers()
309 out_be32(&td->buf_ptr, 0); in fhci_td_transaction_confirm()
405 out_be32(&td->buf_ptr, virt_to_phys(pkt->data)); in fhci_host_transaction()
485 out_be32(&td->buf_ptr, DUMMY2_BD_BUFFER); in fhci_flush_bds()
499 out_be32(&td->buf_ptr, 0); in fhci_flush_bds()
505 out_be32(&td->buf_ptr, 0); in fhci_flush_bds()
510 out_be32(&ep->ep_pram_ptr->tx_state, 0); in fhci_flush_bds()
543 out_be32(&td->buf_ptr, 0); in fhci_flush_actual_frame()
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