Searched refs:mso (Results 1 – 5 of 5) sorted by relevance
168 u32 mso = tpm2_handle_mso(handle); in tpm2_read_public() local 173 if (mso != TPM2_MSO_PERSISTENT && mso != TPM2_MSO_VOLATILE && in tpm2_read_public() 174 mso != TPM2_MSO_NVRAM) { in tpm2_read_public() 245 enum tpm2_mso_type mso = tpm2_handle_mso(handle); in tpm_buf_append_name() local 273 if (mso == TPM2_MSO_PERSISTENT || in tpm_buf_append_name() 274 mso == TPM2_MSO_VOLATILE || in tpm_buf_append_name() 275 mso == TPM2_MSO_NVRAM) { in tpm_buf_append_name() 707 enum tpm2_mso_type mso = tpm2_handle_mso(auth->name_h[i]); in tpm_buf_fill_hmac_session() local 709 if (mso in tpm_buf_fill_hmac_session() [all...]
176 u8 mso; member
6625 switch (FIELD_GET(DISPLAYID_VESA_MSO_MODE, vesa->mso)) { in drm_parse_vesa_mso_data()6646 info->mso_pixel_overlap = FIELD_GET(DISPLAYID_VESA_MSO_OVERLAP, vesa->mso); in drm_parse_vesa_mso_data()
4677 u8 mso; in intel_edp_mso_init() local4682 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_MSO_LINK_CAPABILITIES, &mso) != 1) { in intel_edp_mso_init()4688 mso &= DP_EDP_MSO_NUMBER_OF_LINKS_MASK; in intel_edp_mso_init()4689 if (mso % 2 || mso > drm_dp_max_lane_count(intel_dp->dpcd)) { in intel_edp_mso_init()4690 drm_err(display->drm, "Invalid MSO link count cap %u\n", mso); in intel_edp_mso_init()4691 mso = 0; in intel_edp_mso_init()4694 if (mso) { in intel_edp_mso_init()4697 mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso, in intel_edp_mso_init()4702 mso = 0; in intel_edp_mso_init()4706 intel_dp->mso_link_count = mso; in intel_edp_mso_init()[all …]
3795 vcpu->arch.sie_block->mso = 0; in DEFINE_FREE()