| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 41 static void fetch_socbb_params(struct display_mode_lib *mode_lib); 42 static void fetch_ip_params(struct display_mode_lib *mode_lib); 43 static void fetch_pipe_params(struct display_mode_lib *mode_lib); 45 struct display_mode_lib *mode_lib, 50 static void cache_debug_params(struct display_mode_lib *mode_lib); 53 struct display_mode_lib *mode_lib, in dml_get_voltage_level() argument 57 bool need_recalculate = memcmp(&mode_lib->soc, &mode_lib->vba.soc, sizeof(mode_lib->vba.soc)) != 0 in dml_get_voltage_level() 58 || memcmp(&mode_lib->ip, &mode_lib->vba.ip, sizeof(mode_lib->vba.ip)) != 0 in dml_get_voltage_level() 59 || num_pipes != mode_lib->vba.cache_num_pipes in dml_get_voltage_level() 60 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level() [all …]
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| H A D | display_mode_lib.h | 52 struct display_mode_lib *mode_lib, 64 struct display_mode_lib *mode_lib, 70 struct display_mode_lib *mode_lib, 77 struct display_mode_lib *mode_lib, 81 void (*recalculate)(struct display_mode_lib *mode_lib); 82 void (*validate)(struct display_mode_lib *mode_lib); 104 struct display_mode_lib *mode_lib, 108 void dml_log_mode_support_params(struct display_mode_lib *mode_lib);
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| H A D | dml1_display_rq_dlg_calc.h | 34 struct display_mode_lib *mode_lib, 46 struct display_mode_lib *mode_lib, 55 struct display_mode_lib *mode_lib,
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| H A D | display_mode_vba.h | 32 void ModeSupportAndSystemConfiguration(struct display_mode_lib *mode_lib); 34 #define dml_get_attr_decl(attr) double get_##attr(struct display_mode_lib *mode_lib, const display_… 75 #define dml_get_pipe_attr_decl(attr) double get_##attr(struct display_mode_lib *mode_lib, const dis… 149 struct display_mode_lib *mode_lib, 153 struct display_mode_lib *mode_lib, 157 struct display_mode_lib *mode_lib, 161 struct display_mode_lib *mode_lib, 166 struct display_mode_lib *mode_lib, 170 bool get_is_phantom_pipe(struct display_mode_lib *mode_lib, 174 void PixelClockAdjustmentForProgressiveToInterlaceUnit(struct display_mode_lib *mode_lib);
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_32.c | 32 void dml32_recalculate(struct display_mode_lib *mode_lib); 34 struct display_mode_lib *mode_lib); 35 void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib); 37 void dml32_recalculate(struct display_mode_lib *mode_lib) in dml32_recalculate() argument 39 ModeSupportAndSystemConfiguration(mode_lib); in dml32_recalculate() 41 dml32_CalculateMaxDETAndMinCompressedBufferSize(mode_lib->vba.ConfigReturnBufferSizeInKByte, in dml32_recalculate() 42 mode_lib->vba.ROBBufferSizeInKByte, in dml32_recalculate() 48 &mode_lib->vba.MaxTotalDETInKByte, &mode_lib->vba.nomDETInKByte, in dml32_recalculate() 49 &mode_lib->vba.MinCompressedBufferSizeInKByte); in dml32_recalculate() 51 PixelClockAdjustmentForProgressiveToInterlaceUnit(mode_lib); in dml32_recalculate() [all …]
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| H A D | display_mode_vba_32.h | 61 void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib); 62 void dml32_recalculate(struct display_mode_lib *mode_lib);
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| H A D | display_rq_dlg_calc_32.h | 45 struct display_mode_lib *mode_lib, 63 void dml32_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core.c | 6235 …oinline_for_stack void set_calculate_prefetch_schedule_params(struct display_mode_lib_st *mode_lib, in set_calculate_prefetch_schedule_params() argument 6240 CalculatePrefetchSchedule_params->DSCDelay = mode_lib->ms.DSCDelayPerState[k]; in set_calculate_prefetch_schedule_params() 6241 …CalculatePrefetchSchedule_params->EnhancedPrefetchScheduleAccelerationFinal = mode_lib->ms.policy.… in set_calculate_prefetch_schedule_params() 6242 …edule_params->DPPCLKDelaySubtotalPlusCNVCFormater = mode_lib->ms.ip.dppclk_delay_subtotal + mode_l… in set_calculate_prefetch_schedule_params() 6243 CalculatePrefetchSchedule_params->DPPCLKDelaySCL = mode_lib->ms.ip.dppclk_delay_scl; in set_calculate_prefetch_schedule_params() 6244 … CalculatePrefetchSchedule_params->DPPCLKDelaySCLLBOnly = mode_lib->ms.ip.dppclk_delay_scl_lb_only; in set_calculate_prefetch_schedule_params() 6245 …CalculatePrefetchSchedule_params->DPPCLKDelayCNVCCursor = mode_lib->ms.ip.dppclk_delay_cnvc_cursor; in set_calculate_prefetch_schedule_params() 6246 CalculatePrefetchSchedule_params->DISPCLKDelaySubtotal = mode_lib->ms.ip.dispclk_delay_subtotal; in set_calculate_prefetch_schedule_params() 6247 …etchSchedule_params->DPP_RECOUT_WIDTH = (dml_uint_t)(mode_lib->ms.SwathWidthYThisState[k] / mode_l… in set_calculate_prefetch_schedule_params() 6248 …CalculatePrefetchSchedule_params->OutputFormat = mode_lib->ms.cache_display_cfg.output.OutputForma… in set_calculate_prefetch_schedule_params() [all …]
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| H A D | dml_display_rq_dlg_calc.c | 40 struct display_mode_lib_st *mode_lib, in dml_rq_dlg_get_rq_reg() argument 43 dml_uint_t plane_idx = dml_get_plane_idx(mode_lib, pipe_idx); in dml_rq_dlg_get_rq_reg() 44 …enum dml_source_format_class source_format = mode_lib->ms.cache_display_cfg.surface.SourcePixelFor… in dml_rq_dlg_get_rq_reg() 45 …enum dml_swizzle_mode sw_mode = mode_lib->ms.cache_display_cfg.surface.SurfaceTiling[plane_idx… in dml_rq_dlg_get_rq_reg() 75 pixel_chunk_bytes = (dml_uint_t)(dml_get_pixel_chunk_size_in_kbyte(mode_lib) * 1024); in dml_rq_dlg_get_rq_reg() 76 min_pixel_chunk_bytes = (dml_uint_t)(dml_get_min_pixel_chunk_size_in_byte(mode_lib)); in dml_rq_dlg_get_rq_reg() 81 meta_chunk_bytes = (dml_uint_t)(dml_get_meta_chunk_size_in_kbyte(mode_lib) * 1024); in dml_rq_dlg_get_rq_reg() 82 min_meta_chunk_bytes = (dml_uint_t)(dml_get_min_meta_chunk_size_in_byte(mode_lib)); in dml_rq_dlg_get_rq_reg() 84 dpte_group_bytes = (dml_uint_t)(dml_get_dpte_group_size_in_bytes(mode_lib, pipe_idx)); in dml_rq_dlg_get_rq_reg() 85 mpte_group_bytes = (dml_uint_t)(dml_get_vm_group_size_in_bytes(mode_lib, pipe_idx)); in dml_rq_dlg_get_rq_reg() [all …]
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| H A D | display_mode_util.c | 359 void dml_print_mode_support(struct display_mode_lib_st *mode_lib, dml_uint_t j) in dml_print_mode_support() argument 362 (void)mode_lib; in dml_print_mode_support() 365 …dml_print("DML: MODE SUPPORT: Mode Supported : %s\n", mode_lib->ms.support.ModeSu… in dml_print_mode_support() 366 …dml_print("DML: MODE SUPPORT: Scale Ratio And Taps : %s\n", mode_lib->ms.suppor… in dml_print_mode_support() 367 …dml_print("DML: MODE SUPPORT: Source Format Pixel And Scan : %s\n", mode_lib->ms.suppor… in dml_print_mode_support() 368 …dml_print("DML: MODE SUPPORT: Viewport Size : %s\n", mode_lib->ms.suppor… in dml_print_mode_support() 369 …dml_print("DML: MODE SUPPORT: Link Rate Does Not Match DP Version : %s\n", mode_lib->ms… in dml_print_mode_support() 370 …dml_print("DML: MODE SUPPORT: Link Rate For Multistream Not Indicated : %s\n", mode_lib->ms… in dml_print_mode_support() 371 …dml_print("DML: MODE SUPPORT: BPP For Multi stream Not Indicated : %s\n", mode_lib->ms… in dml_print_mode_support() 372 …dml_print("DML: MODE SUPPORT: Multistream With HDMI Or eDP : %s\n", mode_lib->ms… in dml_print_mode_support() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 245 …lay_cfg *display_cfg, const struct dml2_core_internal_display_mode_lib *mode_lib, unsigned int pip… in dml_get_is_phantom_pipe() argument 247 unsigned int plane_idx = mode_lib->mp.pipe_plane[pipe_idx]; in dml_get_is_phantom_pipe() 254 …pe dml_get_##variable(const struct dml2_core_internal_display_mode_lib *mode_lib, unsigned int pip… 257 plane_idx = mode_lib->mp.pipe_plane[pipe_idx]; \ 261 dml_get_per_pipe_var_func(dpte_group_size_in_bytes, unsigned int, mode_lib->mp.dpte_group_bytes); 262 dml_get_per_pipe_var_func(vm_group_size_in_bytes, unsigned int, mode_lib->mp.vm_group_bytes); 263 dml_get_per_pipe_var_func(swath_height_l, unsigned int, mode_lib->mp.SwathHeightY); 264 dml_get_per_pipe_var_func(swath_height_c, unsigned int, mode_lib->mp.SwathHeightC); 265 dml_get_per_pipe_var_func(dpte_row_height_linear_l, unsigned int, mode_lib->mp.dpte_row_height_line… 266 dml_get_per_pipe_var_func(dpte_row_height_linear_c, unsigned int, mode_lib->mp.dpte_row_height_line… [all …]
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| H A D | dml2_core_dcn4.c | 216 memcpy(&core->clean_me_up.mode_lib.ip, in_out->explicit_ip_bb, in_out->explicit_ip_bb_size); in core_dcn4_initialize() 222 …core->clean_me_up.mode_lib.ip.subvp_pstate_allow_width_us = core_dcn4_ip_caps_base.subvp_pstate_al… in core_dcn4_initialize() 223 …core->clean_me_up.mode_lib.ip.subvp_fw_processing_delay_us = core_dcn4_ip_caps_base.subvp_pstate_a… in core_dcn4_initialize() 224 …core->clean_me_up.mode_lib.ip.subvp_swath_height_margin_lines = core_dcn4_ip_caps_base.subvp_swath… in core_dcn4_initialize() 226 …memcpy(&core->clean_me_up.mode_lib.ip, &core_dcn4_ip_caps_base, sizeof(struct dml2_core_ip_params)… in core_dcn4_initialize() 227 patch_ip_params_with_ip_caps(&core->clean_me_up.mode_lib.ip, in_out->ip_caps); in core_dcn4_initialize() 228 core->clean_me_up.mode_lib.ip.imall_supported = false; in core_dcn4_initialize() 231 memcpy(&core->clean_me_up.mode_lib.soc, in_out->soc_bb, sizeof(struct dml2_soc_bb)); in core_dcn4_initialize() 232 memcpy(&core->clean_me_up.mode_lib.ip_caps, in_out->ip_caps, sizeof(struct dml2_ip_capabilities)); in core_dcn4_initialize() 247 memcpy(&core->clean_me_up.mode_lib.ip, in_out->explicit_ip_bb, in_out->explicit_ip_bb_size); in core_dcn42_initialize() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 785 const struct dml2_core_internal_display_mode_lib *mode_lib = &in_out->core->clean_me_up.mode_lib; in dpmm_dcn4_map_watermarks() local 788 …_ref_clk_mhz > 0) ? (double)display_cfg->overrides.hw.dlg_ref_clk_mhz : mode_lib->soc.dchub_refclk… in dpmm_dcn4_map_watermarks() 791 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].fclk_pstate = (int unsigned)(mode_lib->mp.Water… in dpmm_dcn4_map_watermarks() 792 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].sr_enter = (int unsigned)(mode_lib->mp.Watermar… in dpmm_dcn4_map_watermarks() 793 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].sr_exit = (int unsigned)(mode_lib->mp.Watermark… in dpmm_dcn4_map_watermarks() 794 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].sr_enter_z8 = (int unsigned)(mode_lib->mp.Water… in dpmm_dcn4_map_watermarks() 795 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].sr_exit_z8 = (int unsigned)(mode_lib->mp.Waterm… in dpmm_dcn4_map_watermarks() 796 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].temp_read_or_ppt = (int unsigned)(mode_lib->mp.… in dpmm_dcn4_map_watermarks() 797 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].uclk_pstate = (int unsigned)(mode_lib->mp.Water… in dpmm_dcn4_map_watermarks() 798 …dchubbub_regs->wm_regs[DML2_DCHUB_WATERMARK_SET_A].urgent = (int unsigned)(mode_lib->mp.Watermark.… in dpmm_dcn4_map_watermarks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_mode_vba_21.h | 29 void dml21_recalculate(struct display_mode_lib *mode_lib); 30 void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
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| H A D | display_rq_dlg_calc_21.h | 45 struct display_mode_lib *mode_lib, 61 struct display_mode_lib *mode_lib,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_mode_vba_20v2.h | 29 void dml20v2_recalculate(struct display_mode_lib *mode_lib); 30 void dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
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| H A D | display_mode_vba_20.h | 29 void dml20_recalculate(struct display_mode_lib *mode_lib); 30 void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
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| H A D | display_rq_dlg_calc_20.h | 44 struct display_mode_lib *mode_lib, 61 struct display_mode_lib *mode_lib,
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| H A D | display_rq_dlg_calc_20v2.h | 44 struct display_mode_lib *mode_lib, 61 struct display_mode_lib *mode_lib,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.h | 29 void dml31_recalculate(struct display_mode_lib *mode_lib); 30 void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
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| H A D | display_rq_dlg_calc_31.h | 42 void dml31_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, 57 void dml31_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.h | 30 void dml314_recalculate(struct display_mode_lib *mode_lib); 31 void dml314_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
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| H A D | display_rq_dlg_calc_314.h | 43 void dml314_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, 58 void dml314_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.h | 42 void dml30_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, 57 void dml30_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
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| H A D | display_mode_vba_30.h | 29 void dml30_recalculate(struct display_mode_lib *mode_lib); 30 void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib);
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