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Searched refs:mmTPC0_QM_CQ_RD_RATE_LIM_SAT (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc0_qm_regs.h110 #define mmTPC0_QM_CQ_RD_RATE_LIM_SAT 0xE080F8 macro
/linux/drivers/accel/habanalabs/goya/
H A Dgoya_security.c780 mask |= 1 << ((mmTPC0_QM_CQ_RD_RATE_LIM_SAT & 0x7F) >> 2); in goya_init_tpc_protection_bits()