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Searched refs:mmSDMA0_RLC0_IB_OFFSET (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h314 #define mmSDMA0_RLC0_IB_OFFSET macro
H A Dsdma0_4_0_offset.h402 #define mmSDMA0_RLC0_IB_OFFSET 0x014c macro
H A Dsdma0_4_2_2_offset.h402 #define mmSDMA0_RLC0_IB_OFFSET macro
H A Dsdma0_4_2_offset.h398 #define mmSDMA0_RLC0_IB_OFFSET macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h226 #define mmSDMA0_RLC0_IB_OFFSET 0x350c macro
H A Doss_3_0_1_d.h265 #define mmSDMA0_RLC0_IB_OFFSET 0x350c macro
H A Doss_2_0_d.h280 #define mmSDMA0_RLC0_IB_OFFSET 0x350c macro
H A Doss_3_0_d.h387 #define mmSDMA0_RLC0_IB_OFFSET 0x350c macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v5_2.c103 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_OFFSET),
H A Dsdma_v5_0.c102 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_OFFSET),
H A Dsdma_v4_0.c115 SOC15_REG_ENTRY_STR(GC, 0, mmSDMA0_RLC0_IB_OFFSET),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h394 #define mmSDMA0_RLC0_IB_OFFSET macro
H A Dgc_10_3_0_offset.h392 #define mmSDMA0_RLC0_IB_OFFSET macro