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Searched refs:mmSCRATCH_REG3 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h219 #define mmSCRATCH_REG3 … macro
H A Dgc_9_0_offset.h4647 #define mmSCRATCH_REG3 … macro
H A Dgc_9_1_offset.h4877 #define mmSCRATCH_REG3 … macro
H A Dgc_9_2_1_offset.h4833 #define mmSCRATCH_REG3 … macro
H A Dgc_10_1_0_offset.h7131 #define mmSCRATCH_REG3 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h407 #define mmSCRATCH_REG3 0xc043 macro
H A Dgfx_7_2_d.h419 #define mmSCRATCH_REG3 0xc043 macro
H A Dgfx_8_1_d.h457 #define mmSCRATCH_REG3 0xc043 macro
H A Dgfx_8_0_d.h457 #define mmSCRATCH_REG3 0xc043 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c1829 reg_access_ctrl->scratch_reg3 = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG3); in gfx_v9_0_init_rlcg_reg_access_ctrl()