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Searched refs:mmOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h7009 #define mmOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h6804 #define mmOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h8454 #define mmOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h8358 #define mmOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h9485 #define mmOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h9216 #define mmOTG2_OTG_INTERRUPT_CONTROL_BASE_IDX … macro