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Searched refs:mmDEGAMMA_CONTROL (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v10_0.c2150 tmp = RREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_crtc_load_lut()
2154 WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_crtc_load_lut()
H A Ddce_v8_0.c2067 WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset, in dce_v8_0_crtc_load_lut()
H A Ddce_v6_0.c2156 WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset, in dce_v6_0_crtc_load_lut()
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2475 #define mmDEGAMMA_CONTROL 0x1A58 macro
H A Ddce_8_0_d.h2151 #define mmDEGAMMA_CONTROL 0x1a58 macro
H A Ddce_10_0_d.h3000 #define mmDEGAMMA_CONTROL 0x1a58 macro
H A Ddce_11_0_d.h2754 #define mmDEGAMMA_CONTROL 0x1a58 macro
H A Ddce_11_2_d.h3985 #define mmDEGAMMA_CONTROL 0x1a58 macro