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Searched refs:mmDC_GPIO_DDC3_MASK_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h9197 #define mmDC_GPIO_DDC3_MASK_BASE_IDX … macro
H A Ddcn_1_0_offset.h10512 #define mmDC_GPIO_DDC3_MASK_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h11406 #define mmDC_GPIO_DDC3_MASK_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h11504 #define mmDC_GPIO_DDC3_MASK_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h12827 #define mmDC_GPIO_DDC3_MASK_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h12660 #define mmDC_GPIO_DDC3_MASK_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h1985 #define mmDC_GPIO_DDC3_MASK_BASE_IDX … macro