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Searched refs:mmCP_HQD_HQ_SCHEDULER1 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h600 #define mmCP_HQD_HQ_SCHEDULER1 0x3266 macro
H A Dgfx_7_2_d.h613 #define mmCP_HQD_HQ_SCHEDULER1 0x3266 macro
H A Dgfx_8_1_d.h665 #define mmCP_HQD_HQ_SCHEDULER1 0x3266 macro
H A Dgfx_8_0_d.h665 #define mmCP_HQD_HQ_SCHEDULER1 0x3266 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2889 #define mmCP_HQD_HQ_SCHEDULER1 … macro
H A Dgc_9_1_offset.h3117 #define mmCP_HQD_HQ_SCHEDULER1 … macro
H A Dgc_9_2_1_offset.h3073 #define mmCP_HQD_HQ_SCHEDULER1 … macro
H A Dgc_10_1_0_offset.h5373 #define mmCP_HQD_HQ_SCHEDULER1 … macro
H A Dgc_10_3_0_offset.h5006 #define mmCP_HQD_HQ_SCHEDULER1 … macro