| /linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| H A D | polaris10_pwrvirus.h | 1545 { 0x00000000, mmCP_HQD_ACTIVE },
1548 { 0x00000001, mmCP_HQD_ACTIVE },
1550 { 0x00000000, mmCP_HQD_ACTIVE },
1553 { 0x00000001, mmCP_HQD_ACTIVE },
1555 { 0x00000000, mmCP_HQD_ACTIVE },
1558 { 0x00000001, mmCP_HQD_ACTIVE },
1560 { 0x00000000, mmCP_HQD_ACTIVE },
1563 { 0x00000001, mmCP_HQD_ACTIVE },
1565 { 0x00000000, mmCP_HQD_ACTIVE },
1568 { 0x00000001, mmCP_HQD_ACTIVE },
[all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v9.c | 294 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE, data); in kgd_gfx_v9_hqd_load()
493 act = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE); in kgd_gfx_v9_hqd_is_occupied()
561 temp = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE); in kgd_gfx_v9_hqd_destroy()
1137 if (!RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE)) in kgd_gfx_v9_hqd_get_pq_addr()
1163 uint32_t temp = RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE); in kgd_gfx_v9_hqd_dequeue_wait()
1185 if (!RREG32_SOC15(GC, GET_INST(GC, inst), mmCP_HQD_ACTIVE)) in kgd_gfx_v9_hqd_reset()
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| H A D | amdgpu_amdkfd_gfx_v7.c | 197 WREG32(mmCP_HQD_ACTIVE, data); in kgd_hqd_load()
329 act = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied()
445 temp = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
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| H A D | amdgpu_amdkfd_gfx_v8.c | 221 WREG32(mmCP_HQD_ACTIVE, data); in kgd_hqd_load()
361 act = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied()
480 temp = RREG32(mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
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| H A D | amdgpu_amdkfd_gfx_v10_3.c | 269 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, data); in hqd_load_v10_3()
468 act = RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE); in hqd_is_occupied_v10_3()
534 temp = RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE); in hqd_destroy_v10_3()
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| H A D | amdgpu_amdkfd_gfx_v10.c | 283 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, data); in kgd_hqd_load()
482 act = RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE); in kgd_hqd_is_occupied()
611 temp = RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE); in kgd_hqd_destroy()
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| H A D | gfx_v9_0.c | 263 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_ACTIVE),
1061 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_reset_hw_queue()
3704 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v9_0_kiq_init_register()
3707 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_init_register()
3786 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, in gfx_v9_0_kiq_init_register()
3801 if (RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1) { in gfx_v9_0_kiq_fini_register()
3806 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_kiq_fini_register()
3815 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, 0); in gfx_v9_0_kiq_fini_register()
7296 if (!(RREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE) & 1)) in gfx_v9_0_reset_kcq()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 569 #define mmCP_HQD_ACTIVE 0x3247 macro
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| H A D | gfx_7_2_d.h | 582 #define mmCP_HQD_ACTIVE 0x3247 macro
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| H A D | gfx_8_1_d.h | 632 #define mmCP_HQD_ACTIVE 0x3247 macro
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| H A D | gfx_8_0_d.h | 632 #define mmCP_HQD_ACTIVE 0x3247 macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2823 #define mmCP_HQD_ACTIVE … macro
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| H A D | gc_9_1_offset.h | 3051 #define mmCP_HQD_ACTIVE … macro
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| H A D | gc_9_2_1_offset.h | 3007 #define mmCP_HQD_ACTIVE … macro
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| H A D | gc_10_1_0_offset.h | 5307 #define mmCP_HQD_ACTIVE … macro
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