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Searched refs:mmCC_RB_BACKEND_DISABLE (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvi.c738 {mmCC_RB_BACKEND_DISABLE, true},
755 case mmCC_RB_BACKEND_DISABLE: in vi_get_register_value()
H A Dgfx_v6_0.c1342 data = RREG32(mmCC_RB_BACKEND_DISABLE) | in gfx_v6_0_get_rb_active_bitmap()
1518 RREG32(mmCC_RB_BACKEND_DISABLE); in gfx_v6_0_setup_rb()
H A Dgfx_v8_0.c3434 data = RREG32(mmCC_RB_BACKEND_DISABLE) | in gfx_v8_0_get_rb_active_bitmap()
3639 RREG32(mmCC_RB_BACKEND_DISABLE); in gfx_v8_0_setup_rb()
H A Dgfx_v9_0.c2530 data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE); in gfx_v9_0_get_rb_active_bitmap()
H A Dgfx_v10_0.c5089 data = RREG32_SOC15(GC, 0, mmCC_RB_BACKEND_DISABLE); in gfx_v10_0_get_rb_active_bitmap()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h685 #define mmCC_RB_BACKEND_DISABLE 0x263d macro
H A Dgfx_7_2_d.h698 #define mmCC_RB_BACKEND_DISABLE 0x263d macro
H A Dgfx_8_1_d.h770 #define mmCC_RB_BACKEND_DISABLE 0x263d macro
H A Dgfx_8_0_d.h770 #define mmCC_RB_BACKEND_DISABLE 0x263d macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h935 #define mmCC_RB_BACKEND_DISABLE … macro
H A Dgc_9_1_offset.h905 #define mmCC_RB_BACKEND_DISABLE … macro
H A Dgc_9_2_1_offset.h871 #define mmCC_RB_BACKEND_DISABLE … macro
H A Dgc_10_1_0_offset.h2847 #define mmCC_RB_BACKEND_DISABLE … macro