Searched refs:minimum_clocks (Results 1 – 2 of 2) sorted by relevance
3283 struct PP_Clocks minimum_clocks = {0}; in vega10_apply_state_adjust_rules() local3327 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in vega10_apply_state_adjust_rules()3328 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega10_apply_state_adjust_rules()3358 minimum_clocks.engineClock = stable_pstate_sclk; in vega10_apply_state_adjust_rules()3359 minimum_clocks.memoryClock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()3380 if (sclk < minimum_clocks.engineClock) in vega10_apply_state_adjust_rules()3381 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()3382 max_limits->sclk : minimum_clocks.engineClock; in vega10_apply_state_adjust_rules()3384 if (mclk < minimum_clocks.memoryClock) in vega10_apply_state_adjust_rules()3385 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in vega10_apply_state_adjust_rules()[all …]
3412 struct PP_Clocks minimum_clocks = {0}; in smu7_apply_state_adjust_rules() local3448 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in smu7_apply_state_adjust_rules()3449 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in smu7_apply_state_adjust_rules()3471 minimum_clocks.engineClock = stable_pstate_sclk; in smu7_apply_state_adjust_rules()3472 minimum_clocks.memoryClock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()3503 if (sclk < minimum_clocks.engineClock) in smu7_apply_state_adjust_rules()3504 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()3505 max_limits->sclk : minimum_clocks.engineClock; in smu7_apply_state_adjust_rules()3507 if (mclk < minimum_clocks.memoryClock) in smu7_apply_state_adjust_rules()3508 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in smu7_apply_state_adjust_rules()[all …]