Searched refs:min_clk_index_for_latency (Results 1 – 6 of 6) sorted by relevance
27 return state->min_clk_index_for_latency == 0; in dml2_top_optimization_test_function_min_clk_for_latency()34 if (params->display_config->stage1.min_clk_index_for_latency > 0) { in dml2_top_optimization_optimize_function_min_clk_for_latency()36 params->optimized_display_config->stage1.min_clk_index_for_latency--; in dml2_top_optimization_optimize_function_min_clk_for_latency()177 …mode_support_params.min_clk_index = l->next_candidate_display_cfg.stage3.min_clk_index_for_latency; in dml2_top_optimization_perform_optimization_phase()179 …mode_support_params.min_clk_index = l->next_candidate_display_cfg.stage1.min_clk_index_for_latency; in dml2_top_optimization_perform_optimization_phase()220 highest_state = l->cur_candidate_display_cfg.stage1.min_clk_index_for_latency; in dml2_top_optimization_perform_optimization_phase_1()240 l->cur_candidate_display_cfg.stage1.min_clk_index_for_latency = lowest_state; in dml2_top_optimization_perform_optimization_phase_1()
86 …out->stage1.min_clk_index_for_latency = dml->min_clk_table.dram_bw_table.num_entries - 1; //dml->m… in setup_unoptimized_display_config_with_meta()92 out->stage1.min_clk_index_for_latency = 0; in setup_speculative_display_config_with_meta()111 …e_support_params.min_clk_index = l->base_display_config_with_meta.stage1.min_clk_index_for_latency; in dml2_check_mode_supported()168 …e_support_params.min_clk_index = l->base_display_config_with_meta.stage1.min_clk_index_for_latency; in dml2_build_mode_programming()179 …e_support_params.min_clk_index = l->base_display_config_with_meta.stage1.min_clk_index_for_latency; in dml2_build_mode_programming()
532 state->min_clk_index_for_latency = in_out->base_display_config->stage1.min_clk_index_for_latency; in pmo_dcn3_init_for_pstate_support()533 …scratch.pmo_dcn3.min_latency_index = in_out->base_display_config->stage1.min_clk_index_for_latency; in pmo_dcn3_init_for_pstate_support()535 …scratch.pmo_dcn3.cur_latency_index = in_out->base_display_config->stage1.min_clk_index_for_latency; in pmo_dcn3_init_for_pstate_support()692 …in_out->optimized_display_config->stage3.min_clk_index_for_latency = pmo->scratch.pmo_dcn3.cur_lat… in pmo_dcn3_optimize_for_pstate_support()
1745 …ut->base_display_config->stage3.min_clk_index_for_latency = in_out->base_display_config->stage1.mi… in pmo_dcn4_fams2_init_for_pstate_support()1756 …scratch.pmo_dcn4.min_latency_index = in_out->base_display_config->stage1.min_clk_index_for_latency; in pmo_dcn4_fams2_init_for_pstate_support()1758 …scratch.pmo_dcn4.cur_latency_index = in_out->base_display_config->stage1.min_clk_index_for_latency; in pmo_dcn4_fams2_init_for_pstate_support()2130 …in_out->optimized_display_config->stage3.min_clk_index_for_latency = s->pmo_dcn4.cur_latency_index; in pmo_dcn4_fams2_optimize_for_pstate_support()
230 int min_clk_index_for_latency; member321 int min_clk_index_for_latency; member
30 min_clock_index_for_latency = in_out->display_cfg->stage3.min_clk_index_for_latency; in get_minimum_clocks_for_latency()32 min_clock_index_for_latency = in_out->display_cfg->stage1.min_clk_index_for_latency; in get_minimum_clocks_for_latency()