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Searched refs:mc_mask (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dradeon_device.c572 if (mc->mc_vram_size > (rdev->mc.mc_mask - base + 1)) { in radeon_vram_location()
607 size_af = ((rdev->mc.mc_mask - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align; in radeon_gtt_location()
1349 rdev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */ in radeon_device_init()
1351 rdev->mc.mc_mask = 0xfffffffffULL; /* 36 bit MC */ in radeon_device_init()
1353 rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */ in radeon_device_init()
H A Drv770.c1615 size_af = mc->mc_mask - mc->gtt_end; in r700_vram_gtt_location()
H A Dradeon.h654 u64 mc_mask; member
H A Dr600.c1401 size_af = mc->mc_mask - mc->gtt_end; in r600_vram_gtt_location()
/linux/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_main.c1733 memcpy(mask, dsaf_dev->mac_cb[port_num]->mc_mask, ETH_ALEN); in hns_dsaf_setup_mc_mask()
1774 u8 mc_mask[ETH_ALEN]; in hns_dsaf_add_mac_mc_port() local
1778 mc_mask, mac_entry->addr); in hns_dsaf_add_mac_mc_port()
1779 hns_dsaf_mc_mask_bit_clear(mc_addr, mc_mask); in hns_dsaf_add_mac_mc_port()
1785 mc_mask); in hns_dsaf_add_mac_mc_port()
1944 u8 mc_mask[ETH_ALEN]; in hns_dsaf_del_mac_mc_port() local
1948 mc_mask, mac_entry->addr); in hns_dsaf_del_mac_mc_port()
1949 hns_dsaf_mc_mask_bit_clear(mc_addr, mc_mask); in hns_dsaf_del_mac_mc_port()
1952 hns_dsaf_set_mac_key(dsaf_dev, &mask_key, 0x00, 0xff, mc_mask); in hns_dsaf_del_mac_mc_port()
H A Dhns_dsaf_mac.h313 char mc_mask[ETH_ALEN]; member
H A Dhns_dsaf_mac.c971 mac_cb->mc_mask, ETH_ALEN)) { in hns_mac_get_info()
974 eth_broadcast_addr(mac_cb->mc_mask); in hns_mac_get_info()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gmc.h276 u64 mc_mask; member
H A Damdgpu_gmc.c282 u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_GMC_HOLE_START - 1); in amdgpu_gmc_gart_location()
338 size_af = mc->mc_mask + 1 - ALIGN(mc->fb_end + 1, sixteen_gb); in amdgpu_gmc_agp_location()
H A Dgmc_v6_0.c828 adev->gmc.mc_mask = 0xffffffffffULL; in gmc_v6_0_sw_init()
H A Dgmc_v11_0.c798 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v11_0_sw_init()
H A Dgmc_v12_0.c794 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v12_0_sw_init()
H A Dgmc_v10_0.c869 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v10_0_sw_init()
H A Dgmc_v7_0.c1005 adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */ in gmc_v7_0_sw_init()
H A Dgmc_v8_0.c1118 adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */ in gmc_v8_0_sw_init()
H A Dgmc_v9_0.c2133 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v9_0_sw_init()