Searched refs:max_pipes (Results 1 – 6 of 6) sorted by relevance
1194 rdev->config.rv770.max_pipes = 4; in rv770_gpu_init()1214 rdev->config.rv770.max_pipes = 2; in rv770_gpu_init()1238 rdev->config.rv770.max_pipes = 2; in rv770_gpu_init()1258 rdev->config.rv770.max_pipes = 4; in rv770_gpu_init()1557 num_gs_verts_per_thread = rdev->config.rv770.max_pipes * 16; in rv770_gpu_init()
2007 rdev->config.r600.max_pipes = 4; in r600_gpu_init()2023 rdev->config.r600.max_pipes = 2; in r600_gpu_init()2041 rdev->config.r600.max_pipes = 1; in r600_gpu_init()2056 rdev->config.r600.max_pipes = 4; in r600_gpu_init()2313 tmp = rdev->config.r600.max_pipes * 16; in r600_gpu_init()
330 u32 max_pipes; /* Device max pipes */ member
500 u32 max_pipes; /* Device max pipes */ member
1776 for (pipe = 0; pipe < udc->max_pipes; pipe++) in reset_queues()
7564 const unsigned int max_pipes = MAX_PIPES; in dc_capture_register_software_state() local7588 for (i = 0; i < max_pipes && i < dc->res_pool->pipe_count; i++) { in dc_capture_register_software_state()7734 for (i = 0; i < max_pipes && i < dc->res_pool->pipe_count; i++) { in dc_capture_register_software_state()7775 for (i = 0; i < max_pipes && i < dc->res_pool->pipe_count; i++) { in dc_capture_register_software_state()7802 for (i = 0; i < max_pipes; i++) { in dc_capture_register_software_state()7833 for (i = 0; i < max_pipes && i < dc->res_pool->pipe_count; i++) { in dc_capture_register_software_state()7861 for (i = 0; i < max_pipes && i < dc->res_pool->pipe_count; i++) { in dc_capture_register_software_state()7929 for (i = 0; i < max_pipes && i < dc->res_pool->pipe_count; i++) { in dc_capture_register_software_state()8047 for (i = 0; i < max_pipes && i < dc->res_pool->pipe_count; i++) { in dc_capture_register_software_state()