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Searched refs:is_versal (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/xilinx/
H A Dclk-xlnx-clock-wizard.c181 bool is_versal; member
988 .is_versal = true,
998 bool is_versal = false; in clk_wzrd_register_output_clocks() local
1005 is_versal = data->is_versal; in clk_wzrd_register_output_clocks()
1011 if (is_versal) { in clk_wzrd_register_output_clocks()
1016 clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), in clk_wzrd_register_output_clocks()
1025 edge = !!(readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0)) & in clk_wzrd_register_output_clocks()
1027 regl = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 1)) & in clk_wzrd_register_output_clocks()
1029 regh = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 1)) & in clk_wzrd_register_output_clocks()
1036 regl = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 51)) & in clk_wzrd_register_output_clocks()
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