Searched refs:is_versal (Results 1 – 1 of 1) sorted by relevance
188 bool is_versal; member1124 .is_versal = true,1134 bool is_versal = false; in clk_wzrd_register_output_clocks() local1141 is_versal = data->is_versal; in clk_wzrd_register_output_clocks()1147 if (is_versal) { in clk_wzrd_register_output_clocks()1152 clk_wzrd->base, WZRD_CLK_CFG_REG(is_versal, 3), in clk_wzrd_register_output_clocks()1161 edge = !!(readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 0)) & in clk_wzrd_register_output_clocks()1163 regl = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 1)) & in clk_wzrd_register_output_clocks()1165 regh = (readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 1)) & in clk_wzrd_register_output_clocks()1172 regl = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal, 51)) & in clk_wzrd_register_output_clocks()[all …]