| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_psr.c | 208 #define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \ argument 209 (intel_dp)->psr.source_support) 239 static bool psr_global_enabled(struct intel_dp *intel_dp) in psr_global_enabled() argument 241 struct intel_connector *connector = intel_dp->attached_connector; in psr_global_enabled() 243 switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) { in psr_global_enabled() 245 return intel_dp_is_edp(intel_dp) ? in psr_global_enabled() 254 static bool sel_update_global_enabled(struct intel_dp *intel_dp) in sel_update_global_enabled() argument 256 switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) { in sel_update_global_enabled() 265 static bool panel_replay_global_enabled(struct intel_dp *intel_dp) in panel_replay_global_enabled() argument 267 struct intel_display *display = to_intel_display(intel_dp); in panel_replay_global_enabled() [all …]
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| H A D | intel_dp.c | 119 bool intel_dp_is_edp(struct intel_dp *intel_dp) in intel_dp_is_edp() argument 121 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_dp_is_edp() 126 static void intel_dp_unset_edid(struct intel_dp *intel_dp); 158 static int max_dprx_rate(struct intel_dp *intel_dp) in max_dprx_rate() argument 160 struct intel_display *display = to_intel_display(intel_dp); in max_dprx_rate() 163 if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) in max_dprx_rate() 164 max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel); in max_dprx_rate() 166 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in max_dprx_rate() 174 if (intel_dp_is_edp(intel_dp) && intel_has_quirk(display, QUIRK_EDP_LIMIT_RATE_HBR2)) in max_dprx_rate() 180 static int max_dprx_lane_count(struct intel_dp *intel_dp) in max_dprx_lane_count() argument [all …]
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| H A D | intel_dp_tunnel.c | 30 void intel_dp_tunnel_disconnect(struct intel_dp *intel_dp) in intel_dp_tunnel_disconnect() argument 32 drm_dp_tunnel_destroy(intel_dp->tunnel); in intel_dp_tunnel_disconnect() 33 intel_dp->tunnel = NULL; in intel_dp_tunnel_disconnect() 44 void intel_dp_tunnel_destroy(struct intel_dp *intel_dp) in intel_dp_tunnel_destroy() argument 46 if (intel_dp_tunnel_bw_alloc_is_enabled(intel_dp)) in intel_dp_tunnel_destroy() 47 drm_dp_tunnel_disable_bw_alloc(intel_dp->tunnel); in intel_dp_tunnel_destroy() 49 intel_dp_tunnel_disconnect(intel_dp); in intel_dp_tunnel_destroy() 57 static int get_current_link_bw(struct intel_dp *intel_dp) in get_current_link_bw() argument 59 int rate = intel_dp_max_common_rate(intel_dp); in get_current_link_bw() 60 int lane_count = intel_dp_max_common_lane_count(intel_dp); in get_current_link_bw() [all …]
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| H A D | g4x_dp.c | 96 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_dp_prepare() local 101 intel_dp_set_link_params(intel_dp, in intel_dp_prepare() 124 intel_dp->DP = intel_de_read(display, intel_dp->output_reg) & DP_DETECTED; in intel_dp_prepare() 127 intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in intel_dp_prepare() 128 intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); in intel_dp_prepare() 134 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare() 136 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare() 137 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare() 140 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare() 142 intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe); in intel_dp_prepare() [all …]
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| H A D | intel_dp_tunnel.h | 19 struct intel_dp; 26 int intel_dp_tunnel_detect(struct intel_dp *intel_dp, struct drm_modeset_acquire_ctx *ctx); 27 void intel_dp_tunnel_disconnect(struct intel_dp *intel_dp); 28 void intel_dp_tunnel_destroy(struct intel_dp *intel_dp); 29 void intel_dp_tunnel_resume(struct intel_dp *intel_dp, 32 void intel_dp_tunnel_suspend(struct intel_dp *intel_dp); 34 bool intel_dp_tunnel_bw_alloc_is_enabled(struct intel_dp *intel_dp); 40 struct intel_dp *intel_dp, 51 struct intel_dp *intel_dp, 62 intel_dp_tunnel_detect(struct intel_dp *intel_dp, struct drm_modeset_acquire_ctx *ctx) in intel_dp_tunnel_detect() argument [all …]
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| H A D | intel_alpm.c | 28 bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp) in intel_alpm_aux_wake_supported() argument 30 return intel_dp->alpm_dpcd & DP_ALPM_CAP; in intel_alpm_aux_wake_supported() 33 bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp) in intel_alpm_aux_less_wake_supported() argument 35 return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP; in intel_alpm_aux_less_wake_supported() 38 bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp, in intel_alpm_is_alpm_aux_less() argument 41 return intel_psr_needs_alpm_aux_less(intel_dp, crtc_state) || in intel_alpm_is_alpm_aux_less() 42 (crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp)); in intel_alpm_is_alpm_aux_less() 45 void intel_alpm_init(struct intel_dp *intel_dp) in intel_alpm_init() argument 47 mutex_init(&intel_dp->alpm.lock); in intel_alpm_init() 119 _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp, in _lnl_compute_aux_less_alpm_params() argument [all …]
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| H A D | intel_dp_aux.h | 13 struct intel_dp; 16 void intel_dp_aux_fini(struct intel_dp *intel_dp); 17 void intel_dp_aux_init(struct intel_dp *intel_dp); 23 int intel_dp_aux_fw_sync_len(struct intel_dp *intel_dp);
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| H A D | intel_display_types.h | 600 struct intel_dp *dp; 1794 struct intel_dp { struct 1884 u32 (*get_aux_clock_divider)(struct intel_dp *dp, int index); argument 1889 u32 (*get_aux_send_ctl)(struct intel_dp *dp, int send_bytes, argument 1892 i915_reg_t (*aux_ch_ctl_reg)(struct intel_dp *dp); argument 1893 i915_reg_t (*aux_ch_data_reg)(struct intel_dp *dp, int index); argument 1896 void (*prepare_link_retrain)(struct intel_dp *intel_dp, argument 1898 void (*set_link_train)(struct intel_dp *intel_dp, argument 1901 void (*set_idle_link_train)(struct intel_dp *intel_dp, argument 1904 u8 (*preemph_max)(struct intel_dp *intel_dp); argument [all …]
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| H A D | intel_vrr.c | 38 struct intel_dp *intel_dp; in intel_vrr_is_capable() local 57 intel_dp = intel_attached_dp(connector); in intel_vrr_is_capable() 59 if (!drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd)) in intel_vrr_is_capable() 413 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_vrr_compute_config() local 414 bool is_edp = intel_dp_is_edp(intel_dp); in intel_vrr_compute_config()
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| H A D | intel_cdclk.c | 2628 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_set_cdclk() local 2630 intel_psr_pause(intel_dp); in intel_set_cdclk() 2642 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_set_cdclk() local 2644 mutex_lock_nest_lock(&intel_dp->aux.hw_mutex, in intel_set_cdclk() 2651 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_set_cdclk() local 2653 mutex_unlock(&intel_dp->aux.hw_mutex); in intel_set_cdclk() 2658 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_set_cdclk() local 2660 intel_psr_resume(intel_dp); in intel_set_cdclk()
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| /linux/drivers/gpu/drm/gma500/ |
| H A D | cdv_intel_dp.c | 324 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_max_lane_count() local 327 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in cdv_intel_dp_max_lane_count() 328 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count() 342 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_max_link_bw() local 343 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; in cdv_intel_dp_max_link_bw() 380 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_vdd_on() local 383 if (intel_dp->panel_on) { in cdv_intel_edp_panel_vdd_on() 394 msleep(intel_dp->panel_power_up_delay); in cdv_intel_edp_panel_vdd_on() 415 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_on() local 418 if (intel_dp->panel_on) in cdv_intel_edp_panel_on() [all …]
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| /linux/drivers/gpu/drm/xe/ |
| H A D | Makefile | 273 i915-display/intel_dp.o \
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