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Searched refs:hwseq (Results 1 – 25 of 40) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c85 static bool gpu_addr_to_uma(struct dce_hwseq *hwseq, in gpu_addr_to_uma() argument
90 if (hwseq->fb_base.quad_part <= addr->quad_part && in gpu_addr_to_uma()
91 addr->quad_part < hwseq->fb_top.quad_part) { in gpu_addr_to_uma()
92 addr->quad_part -= hwseq->fb_base.quad_part; in gpu_addr_to_uma()
93 addr->quad_part += hwseq->fb_offset.quad_part; in gpu_addr_to_uma()
95 } else if (hwseq->fb_offset.quad_part <= addr->quad_part && in gpu_addr_to_uma()
96 addr->quad_part <= hwseq->uma_top.quad_part) { in gpu_addr_to_uma()
107 static void plane_address_in_gpu_space_to_uma(struct dce_hwseq *hwseq, in plane_address_in_gpu_space_to_uma() argument
112 gpu_addr_to_uma(hwseq, &addr->grph.addr); in plane_address_in_gpu_space_to_uma()
113 gpu_addr_to_uma(hwseq, &addr->grph.meta_addr); in plane_address_in_gpu_space_to_uma()
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H A Ddcn201_init.c134 dc->hwseq->funcs = dcn201_private_funcs; in dcn201_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn303/
H A Ddcn303_init.c36 dc->hwseq->funcs.dpp_pg_control = dcn303_dpp_pg_control; in dcn303_hw_sequencer_construct()
37 dc->hwseq->funcs.hubp_pg_control = dcn303_hubp_pg_control; in dcn303_hw_sequencer_construct()
38 dc->hwseq->funcs.dsc_pg_control = dcn303_dsc_pg_control; in dcn303_hw_sequencer_construct()
39 dc->hwseq->funcs.enable_power_gating_plane = dcn303_enable_power_gating_plane; in dcn303_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn302/
H A Ddcn302_init.c38 dc->hwseq->funcs.dpp_pg_control = dcn302_dpp_pg_control; in dcn302_hw_sequencer_construct()
39 dc->hwseq->funcs.hubp_pg_control = dcn302_hubp_pg_control; in dcn302_hw_sequencer_construct()
40 dc->hwseq->funcs.dsc_pg_control = dcn302_dsc_pg_control; in dcn302_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c78 struct dce_hwseq *hws = dc->hwseq;
133 struct dce_hwseq *hws = dc->hwseq; in dcn35_init_hw()
603 dc->hwseq->funcs.edp_backlight_control && in dcn35_power_down_on_boot()
604 dc->hwseq->funcs.power_down && in dcn35_power_down_on_boot()
606 dc->hwseq->funcs.edp_backlight_control(edp_link, false); in dcn35_power_down_on_boot()
607 dc->hwseq->funcs.power_down(dc); in dcn35_power_down_on_boot()
615 dc->hwseq->funcs.power_down) { in dcn35_power_down_on_boot()
616 dc->hwseq->funcs.power_down(dc); in dcn35_power_down_on_boot()
695 struct dce_hwseq *hws = dc->hwseq; in dcn35_init_pipes()
955 struct dce_hwseq *hws = dc->hwseq; in dcn35_disable_plane()
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/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_vm_helper.c43 num_vmids = dc->hwss.init_sys_ctx(dc->hwseq, dc, pa_config); in dc_setup_system_context()
59 dc->hwss.init_vm_ctx(dc->hwseq, dc, va_config, vmid); in dc_setup_vm_context()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c133 struct dce_hwseq *hws = dc->hwseq; in log_mpc_crc()
818 struct dce_hwseq *hws = dc->hwseq; in undo_DEGVIDCN10_253_wa()
838 struct dce_hwseq *hws = dc->hwseq; in apply_DEGVIDCN10_253_wa()
868 struct dce_hwseq *hws = dc->hwseq; in dcn10_bios_golden_init()
914 if (!dc->hwseq->wa.false_optc_underflow) in false_optc_underflow_wa()
1229 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_disconnect()
1276 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_power_down()
1306 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_disable()
1339 struct dce_hwseq *hws = dc->hwseq; in dcn10_disable_plane()
1356 struct dce_hwseq *hws = dc->hwseq; in dcn10_init_pipes()
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H A Ddcn10_init.c125 dc->hwseq->funcs = dcn10_private_funcs; in dcn10_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c400 struct dce_hwseq *hws = dc->hwseq; in dcn20_init_blank()
695 struct dce_hwseq *hws = dc->hwseq; in dcn20_plane_atomic_disable()
819 struct dce_hwseq *hws = dc->hwseq; in dcn20_enable_stream_timing()
902 if (dc->hwseq->funcs.PLAT_58856_wa && (!dc_is_dp_signal(stream->signal))) in dcn20_enable_stream_timing()
903 dc->hwseq->funcs.PLAT_58856_wa(context, pipe_ctx); in dcn20_enable_stream_timing()
1104 struct dce_hwseq *hws = dc->hwseq; in dcn20_set_input_transfer_func()
1297 dcn20_power_on_plane_resources(dc->hwseq, pipe_ctx); in dcn20_enable_plane()
1659 struct dce_hwseq *hws = dc->hwseq; in dcn20_update_dchubp_dpp()
1870 struct dce_hwseq *hws = dc->hwseq; in dcn20_program_pipe()
2013 struct dce_hwseq *hws = dc->hwseq; in dcn20_program_front_end_for_ctx()
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H A Ddcn20_init.c143 dc->hwseq->funcs = dcn20_private_funcs; in dcn20_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c522 struct dce_hwseq *hws = dc->hwseq; in dcn32_set_input_transfer_func()
719 struct dce_hwseq *hws = dc->hwseq; in dcn32_program_mall_pipe_config()
776 struct dce_hwseq *hws = dc->hwseq; in dcn32_init_hw()
793 hws->funcs.disable_vga(dc->hwseq); in dcn32_init_hw()
853 hws->funcs.enable_power_gating_plane(dc->hwseq, true); in dcn32_init_hw()
1171 dc->hwseq->funcs.blank_pixel_data(dc, pipe_ctx, true); in dcn32_update_odm()
1215 struct dce_hwseq *hws = dc->hwseq; in dcn32_calculate_pix_rate_divider()
1297 struct dce_hwseq *hws = link->dc->hwseq; in dcn32_unblank_stream()
1505 struct dce_hwseq *hws = dc->hwseq; in dcn32_update_dsc_pg()
1526 struct dce_hwseq *hws = dc->hwseq; in dcn32_disable_phantom_streams()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dce80/
H A Ddce80_hwseq.c49 dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating; in dce80_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_hw_sequencer.c278 struct dce_hwseq *hws = dc->hwseq; in dce60_program_front_end_for_pipe()
286 dce_enable_fe_clock(dc->hwseq, mi->inst, true); in dce60_program_front_end_for_pipe()
425 dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating; in dce60_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c70 struct dce_hwseq *hws = dc->hwseq; in enable_memory_low_power()
110 struct dce_hwseq *hws = dc->hwseq; in dcn31_init_hw()
123 hws->funcs.disable_vga(dc->hwseq); in dcn31_init_hw()
180 hws->funcs.enable_power_gating_plane(dc->hwseq, true); in dcn31_init_hw()
572 struct dce_hwseq *hws = dc->hwseq; in dcn31_reset_hw_ctx_wrap()
H A Ddcn31_init.c155 dc->hwseq->funcs = dcn31_private_funcs; in dcn31_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c1197 struct dce_hwseq *hws = link->dc->hwseq; in dce110_unblank_stream()
1215 struct dce_hwseq *hws = link->dc->hwseq; in dce110_blank_stream()
1581 struct dce_hwseq *hws = dc->hwseq; in dce110_apply_single_controller_ctx_to_hw()
1884 struct dce_hwseq *hws = dc->hwseq; in dce110_enable_accelerated_mode()
2415 struct dce_hwseq *hws = dc->hwseq; in dce110_apply_ctx_to_hw()
2448 dce_crtc_switch_to_clk_src(dc->hwseq, in dce110_apply_ctx_to_hw()
2463 if (dc->hwseq->funcs.setup_hpo_hw_control && was_hpo_acquired != is_hpo_acquired) { in dce110_apply_ctx_to_hw()
2464 dc->hwseq->funcs.setup_hpo_hw_control(dc->hwseq, is_hpo_acquired); in dce110_apply_ctx_to_hw()
2575 dce_set_blender_mode(dc->hwseq, pipe_ctx->stream_res.tg->inst, blender_mode); in program_surface_visibility()
2775 struct dce_hwseq *hws = dc->hwseq; in init_hw()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dce100/
H A Ddce100_hwseq.c138 dc->hwseq->funcs.enable_display_power_gating = dce100_enable_display_power_gating; in dce100_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce112/
H A Ddce112_hwseq.c158 dc->hwseq->funcs.enable_display_power_gating = dce112_enable_display_power_gating; in dce112_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
H A Ddce120_clk_mgr.c149 if (dce121_xgmi_enabled(ctx->dc->hwseq)) in dce121_clk_mgr_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn21/
H A Ddcn21_init.c148 dc->hwseq->funcs = dcn21_private_funcs; in dcn21_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn301/
H A Ddcn301_init.c150 dc->hwseq->funcs = dcn301_private_funcs; in dcn301_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce120/
H A Ddce120_hwseq.c265 dc->hwseq->funcs.enable_display_power_gating = dce120_enable_display_power_gating; in dce120_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_init.c152 dc->hwseq->funcs = dcn30_private_funcs; in dcn30_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
H A Ddcn314_init.c161 dc->hwseq->funcs = dcn314_private_funcs; in dcn314_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c131 struct dce_hwseq *hws = dc->hwseq; in dcn401_read_ono_state()
217 struct dce_hwseq *hws = dc->hwseq; in dcn401_init_hw()
307 hws->funcs.enable_power_gating_plane(dc->hwseq, true); in dcn401_init_hw()
810 struct dce_hwseq *hws = dc->hwseq; in dcn401_enable_stream_timing()
861 if (dc->hwseq->funcs.PLAT_58856_wa && (!dc_is_dp_signal(stream->signal))) in dcn401_enable_stream_timing()
862 dc->hwseq->funcs.PLAT_58856_wa(context, pipe_ctx); in dcn401_enable_stream_timing()
1623 dc->hwseq->funcs.blank_pixel_data(dc, otg_master, true); in dcn401_update_odm()
1632 struct dce_hwseq *hws = link->dc->hwseq; in dcn401_unblank_stream()

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