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Searched refs:h_active (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn201/
H A Ddcn201_dpp.c196 if (scl_data->viewport.width != scl_data->h_active && in dpp201_get_optimal_number_of_taps()
202 if (scl_data->viewport.width > scl_data->h_active && in dpp201_get_optimal_number_of_taps()
/linux/drivers/video/fbdev/via/
H A Dchip.h128 int h_active; member
H A Ddvi.c331 if ((viaparinfo->tmds_setting_info->h_active == 1600) && in dvi_patch_skew_dvp0()
H A Dhw.c1516 viaparinfo->tmds_setting_info->h_active = hres; in viafb_update_device_setting()
1521 viaparinfo->tmds_setting_info->h_active = hres; in viafb_update_device_setting()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/
H A Ddml2_pmo_dcn6_stage_optimizers.c1286 static bool calculate_h_split_for_scaling_transform(int full_vp_width, int h_active, int num_pipes, in calculate_h_split_for_scaling_transform() argument
1289 (void)h_active; in calculate_h_split_for_scaling_transform()
1476 plane->composition.scaler_info.plane0.h_ratio * stream->timing.h_active in dml2_pmo_dcn6_stage_optimizer_mcache_decide_shifts()
1483 plane->composition.scaler_info.plane1.h_ratio * stream->timing.h_active in dml2_pmo_dcn6_stage_optimizer_mcache_decide_shifts()
1522 stream->timing.h_active, num_dpps, scaling_transform, in dml2_pmo_dcn6_stage_optimizer_mcache_decide_shifts()
1536 stream->timing.h_active, num_dpps, scaling_transform, in dml2_pmo_dcn6_stage_optimizer_mcache_decide_shifts()
/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_sdvo_regs.h68 u8 h_active; /**< lower 8 bits (pixels) */ member
H A Dpsb_intel_sdvo.c774 dtd->part1.h_active = width & 0xff; in psb_intel_sdvo_get_dtd_from_mode()
805 mode->hdisplay = dtd->part1.h_active; in psb_intel_sdvo_get_mode_from_dtd()
/linux/drivers/video/fbdev/
H A Dsmscufx.c662 u16 h_total, h_active, h_blank_start, h_blank_end, h_sync_start, h_sync_end; in ufx_set_vid_mode() local
686 h_active = var->xres; in ufx_set_vid_mode()
692 temp = ((h_total - 1) << 16) | (h_active - 1); in ufx_set_vid_mode()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c1594 pipe_ctx->plane_res.scl_data.h_active = odm_slice_src.width; in resource_build_scaling_params()
1743 pipe_ctx->plane_res.scl_data.h_active, in resource_build_scaling_params()
2270 int h_active; in resource_get_odm_slice_dst_width() local
2279 h_active = timing->h_addressable + in resource_get_odm_slice_dst_width()
2283 width = h_active / count; in resource_get_odm_slice_dst_width()
2299 h_active - width * (count - 1) : in resource_get_odm_slice_dst_width()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn6_calcs_dchub.c220 …unsigned int h_active = p->display_cfg->stream_descriptors[p->display_cfg->plane_descriptors[plane… in calculate_max_mem_size_per_plane_per_dpp() local
243 …odm_slice_pixels = (double)h_active / odm_combine_factor * h_ratio + (odm_combine_factor == 3 ? 2 … in calculate_max_mem_size_per_plane_per_dpp()
716 l->hactive = l->timing->h_active; in dcn6_rq_dlg_get_dlg_reg()
H A Ddml2_core_dcn5_funcs_mode_programming.c296 display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_active, in dcn5_mode_programming()
659 … = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_active; in dcn5_mode_programming()
H A Ddml2_core_dcn5_calcs_dchub.c311 …ream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_active / odm_hactive_fac… in dcn5_calculate_swath_width()
319 …, display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.h_active); in dcn5_calculate_swath_width()
5550 l->hactive = l->timing->h_active; in dcn5_rq_dlg_get_dlg_reg()
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.c1173 crtc_info->h_total - crtc_info->h_active; in calc_max_audio_packets_per_line()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn60/
H A Ddcn60_hwseq.c74 audio_output->crtc_info.h_active = in dcn60_build_audio_output()