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Searched refs:eventsel (Results 1 – 5 of 5) sorted by relevance

/linux/tools/testing/selftests/kvm/include/x86/
H A Dpmu.h16 * Encode an eventsel+umask pair into event-select MSR format. Note, this is
21 #define RAW_EVENT(eventsel, umask) (((eventsel & 0xf00UL) << 24) | \ argument
22 ((eventsel) & 0xff) | \
/linux/arch/x86/events/amd/
H A Dcore.c319 static inline int amd_pmu_addr_offset(int index, bool eventsel) in amd_pmu_addr_offset() argument
326 if (eventsel) in amd_pmu_addr_offset()
339 if (eventsel) in amd_pmu_addr_offset()
1330 .eventsel = MSR_K7_EVNTSEL0,
1432 x86_pmu.eventsel = MSR_F15H_PERF_CTL; in amd_core_pmu_init()
/linux/tools/testing/selftests/kvm/x86/
H A Dpmu_counters_test.c289 u64 eventsel; in guest_test_arch_event()
306 eventsel = ARCH_PERFMON_EVENTSEL_OS | ARCH_PERFMON_EVENTSEL_ENABLE | in guest_test_arch_event()
313 __guest_test_arch_event(idx, i, base_pmc_msr + i, MSR_P6_EVNTSEL0 + i, eventsel); in guest_test_arch_event()
292 u64 eventsel = ARCH_PERFMON_EVENTSEL_OS | guest_test_arch_event() local
/linux/arch/x86/events/
H A Dperf_event.h849 unsigned eventsel;
852 int (*addr_offset)(int index, bool eventsel);
1221 return x86_pmu.eventsel + (x86_pmu.addr_offset ?
853 unsigned eventsel; global() member
/linux/arch/x86/events/intel/
H A Dcore.c312 * Note the low 8 bits eventsel code is not a continuous field, containing
6677 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0,
6731 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0, in intel_clovertown_quirk()
7777 static inline int intel_pmu_v6_addr_offset(int index, bool eventsel) in intel_pmu_init_glc()
9005 x86_pmu.eventsel = MSR_IA32_PMC_V6_GP0_CFG_A;
7703 intel_pmu_v6_addr_offset(int index,bool eventsel) intel_pmu_v6_addr_offset() argument