Home
last modified time | relevance | path

Searched refs:ereg (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/regulator/
H A Dda903x-regulator.c309 #define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
325 .enable_reg = _pmic##_##ereg, \
329 #define DA903x_DVC(_pmic, _id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
347 .enable_reg = _pmic##_##ereg, \
351 #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
352 DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
354 #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
355 DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
357 #define DA9030_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
359 ereg, ebi
361 DA9034_DVC(_id,min,max,step,vreg,nbits,ureg,ubit,ereg,ebit) global() argument
365 DA9035_DVC(_id,min,max,step,vreg,nbits,ureg,ubit,ereg,ebit) global() argument
[all...]
H A Dhi6421-regulator.c123 * ereg - enable register
129 #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
144 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
162 * ereg - enable register
169 ereg, emask, odelay, ecomask, ecoamp) \ argument
184 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
202 * ereg - enable register
209 ereg, emask, odelay, ecomask, ecoamp) \ argument
224 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
239 * ereg
245 HI6421_BUCK012(_id,_match,vreg,vmask,ereg,emask,sleepmask,etime,odelay) global() argument
282 HI6421_BUCK345(_id,_match,v_table,vreg,vmask,ereg,emask,odelay,sleepmask) global() argument
[all...]
H A D88pm8607.c231 #define PM8606_PREG(ereg, ebit) \ argument
241 .enable_reg = PM8606_##ereg, \
247 #define PM8607_DVC(vreg, ureg, ubit, ereg, ebit) \ argument
263 .enable_reg = PM8607_##ereg, \
270 #define PM8607_LDO(_id, vreg, shift, ereg, ebit) \ argument
284 .enable_reg = PM8607_##ereg, \
H A Dbd71815-regulator.c407 #define BD71815_FIXED_REG(_name, _id, ereg, emsk, voltage, _dvs) \ argument
419 .enable_reg = (ereg), \
426 #define BD71815_BUCK_REG(_name, _id, vsel, ereg, min, max, step, _dvs) \ argument
441 .enable_reg = (ereg), \
448 #define BD71815_BUCK12_REG(_name, _id, vsel, ereg, min, max, step, \ argument
464 .enable_reg = (ereg), \
466 .ramp_reg = (ereg), \
475 #define BD71815_LED_REG(_name, _id, csel, mask, ereg, emsk, currents) \ argument
489 .enable_reg = (ereg), \
494 #define BD71815_LDO_REG(_name, _id, vsel, ereg, emsk, min, max, step, \ argument
[all …]
H A Dhi655x-regulator.c107 #define HI655X_LDO(_ID, vreg, vmask, ereg, dreg, \ argument
121 .enable_reg = HI655X_BUS_ADDR(ereg), \
128 #define HI655X_LDO_LINEAR(_ID, vreg, vmask, ereg, dreg, \ argument
143 .enable_reg = HI655X_BUS_ADDR(ereg), \
H A D88pm800-regulator.c86 #define PM800_BUCK(match, vreg, ereg, ebit, amax, volt_ranges, n_volt) \ argument
101 .enable_reg = PM800_##ereg, \
116 #define PM800_LDO(match, vreg, ereg, ebit, amax, ldo_volt_table) \ argument
129 .enable_reg = PM800_##ereg, \
H A Dhi6421v530-regulator.c65 * ereg - enable register
70 #define HI6421V530_LDO(_ID, v_table, vreg, vmask, ereg, emask, \
84 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
73 HI6421V530_LDO(_ID,v_table,vreg,vmask,ereg,emask,odelay,ecomask,ecoamp) global() argument
H A Drn5t618-regulator.c25 #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ argument
37 .enable_reg = RN5T618_##ereg, \
H A Dhi6421v600-regulator.c66 * @ereg: enable register
74 #define HI6421V600_LDO(_id, vtable, ereg, emask, vreg, \ argument
89 .enable_reg = ereg, \
H A Dmt6360-regulator.c322 #define MT6360_REGULATOR_DESC(match, _name, _sname, ereg, emask, vreg, \ argument
338 .enable_reg = ereg, \
H A Dslg51000-regulator.c48 unsigned int ereg; member
357 ret = regmap_bulk_read(regmap, es_reg[i].ereg, evt[i], REG_MAX); in slg51000_irq_handler()
/linux/drivers/net/phy/
H A Dmicrochip_t1.c282 static int lan937x_dsp_workaround(struct phy_device *phydev, u16 ereg, u8 bank) in lan937x_dsp_workaround() argument
298 val = ereg & ~LAN87XX_REG_ADDR_MASK; in lan937x_dsp_workaround()
316 u16 ereg = 0; in access_ereg() local
331 ereg = LAN87XX_EXT_REG_CTL_WR_CTL; in access_ereg()
336 ereg = LAN87XX_EXT_REG_CTL_RD_CTL; in access_ereg()
339 ereg |= (bank << 8) | offset; in access_ereg()
343 rc = lan937x_dsp_workaround(phydev, ereg, bank); in access_ereg()
348 rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, ereg); in access_ereg()