| /linux/drivers/gpu/drm/amd/display/dc/dwb/ |
| H A D | Makefile | 32 AMD_DAL_DWB_DCN30 = $(addprefix $(AMDDALPATH)/dc/dwb/dcn30/,$(DWB_DCN30))
41 AMD_DAL_DWB_DCN35 = $(addprefix $(AMDDALPATH)/dc/dwb/dcn35/,$(DWB_DCN35))
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_stream.c | 598 struct dwbc *dwb; in dc_stream_add_writeback()
619 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
620 dwb->dwb_is_drc = false; in dc_stream_add_writeback()
640 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_fc_disable_writeback()
642 dwb->otg_inst = stream_status->primary_otg_inst; in dc_stream_fc_disable_writeback()
652 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_fc_disable_writeback()
654 if (dwb->funcs->is_enabled(dwb)) {
670 struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dc_stream_remove_writeback()
689 if (dwb in dc_stream_remove_writeback()
557 struct dwbc *dwb; dc_stream_add_writeback() local
599 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; dc_stream_add_writeback() local
611 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; dc_stream_add_writeback() local
629 struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst]; dc_stream_fc_disable_writeback() local
709 struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst]; dc_stream_remove_writeback() local
[all...] |
| H A D | dc_hw_sequencer.c | 3129 struct dwbc *dwb = params->dwbc_enable_params.dwb; in hwss_set_cursor_position()
3132 if (dwb->funcs->enable) in hwss_set_cursor_position()
3133 dwb->funcs->enable(dwb, dwb_params);
3138 struct dwbc *dwb = params->dwbc_disable_params.dwb; in hwss_set_cursor_sdr_white_level()
3140 if (dwb->funcs->disable) in hwss_set_cursor_sdr_white_level()
3141 dwb->funcs->disable(dwb); in hwss_set_cursor_sdr_white_level()
2731 struct dwbc *dwb = params->dwbc_enable_params.dwb; hwss_dwbc_enable() local
2740 struct dwbc *dwb = params->dwbc_disable_params.dwb; hwss_dwbc_disable() local
2748 struct dwbc *dwb = params->dwbc_update_params.dwb; hwss_dwbc_update() local
3423 hwss_add_dwbc_update(struct block_sequence_state * seq_state,struct dwbc * dwb,struct dc_dwb_params * dwb_params) hwss_add_dwbc_update() argument
3507 hwss_add_dwbc_enable(struct block_sequence_state * seq_state,struct dwbc * dwb,struct dc_dwb_params * dwb_params) hwss_add_dwbc_enable() argument
3519 hwss_add_dwbc_disable(struct block_sequence_state * seq_state,struct dwbc * dwb) hwss_add_dwbc_disable() argument
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | Makefile | 25 … clk_mgr dce gpio hwss irq link dsc resource optc dpp hubbub dccg hubp dio dwb hpo mmhubbub mpc op…
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| H A D | dc.h | 891 bool dwb : 1; /* Display writeback */
835 bool dwb : 1; /* Display writeback */ global() member
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 3311 struct dwbc *dwb; in dcn401_setup_gsl_group_as_lock_sequence()
3347 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn401_setup_gsl_group_as_lock_sequence()
3349 if (dwb->funcs->is_enabled(dwb)) { in dcn401_setup_gsl_group_as_lock_sequence()
3370 struct dwbc *dwb; in dcn401_disable_plane_sequence()
3376 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn401_disable_plane_sequence()
3380 hwss_add_dwbc_update(seq_state, dwb, &wb_info->dwb_params); in dcn401_disable_plane_sequence()
3395 hwss_add_dwbc_enable(seq_state, dwb, &wb_info->dwb_params); in dcn401_disable_plane_sequence()
3403 struct dwbc *dwb; in dcn401_disable_plane_sequence()
3409 dwb in dcn401_post_unlock_reset_opp_sequence()
3135 struct dwbc *dwb; dcn401_program_all_writeback_pipes_in_tree_sequence() local
3193 struct dwbc *dwb; dcn401_enable_writeback_sequence() local
3226 struct dwbc *dwb; dcn401_disable_writeback_sequence() local
3252 struct dwbc *dwb; dcn401_update_writeback_sequence() local
[all...] |
| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-iob-defs.h | 748 uint64_t dwb:3; member
754 uint64_t dwb:3;
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| H A D | cvmx-pko-defs.h | 716 uint64_t dwb:9; member
722 uint64_t dwb:9;
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 1730 dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb); in dcn35_clock_source_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 1750 dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb); in dcn35_clock_source_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 1737 dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb); in dcn35_clock_source_create()
|