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Searched refs:dsi_ctx (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/panel/
H A Dpanel-himax-hx83102.c94 static void hx83102_enable_extended_cmds(struct mipi_dsi_multi_context *dsi_ctx, bool enable) in hx83102_enable_extended_cmds()
97 mipi_dsi_dcs_write_seq_multi(dsi_ctx, HX83102_SETEXTC, 0x83, 0x10, 0x21, 0x55, 0x00);
99 mipi_dsi_dcs_write_seq_multi(dsi_ctx, HX83102_SETEXTC, 0x00, 0x00, 0x00); in starry_himax83102_j02_init()
104 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; in starry_himax83102_j02_init()
106 hx83102_enable_extended_cmds(&dsi_ctx, true); in starry_himax83102_j02_init()
107 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, in starry_himax83102_j02_init()
111 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 0x00, in starry_himax83102_j02_init()
113 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x76, 0x76, 0x76, 0x76, 0x76, in starry_himax83102_j02_init()
115 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcd); in starry_himax83102_j02_init()
116 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIP in starry_himax83102_j02_init()
90 hx83102_enable_extended_cmds(struct mipi_dsi_multi_context * dsi_ctx,bool enable) hx83102_enable_extended_cmds() argument
100 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; starry_himax83102_j02_init() local
197 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; boe_nv110wum_init() local
302 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; csot_pna957qt1_1_init() local
399 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; ivo_t109nw41_init() local
504 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; kingdisplay_kd110n11_51ie_init() local
594 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; starry_2082109qfh040022_50e_init() local
709 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; holitech_htf065h045_init() local
933 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; hx83102_disable() local
965 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; hx83102_prepare() local
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H A Dpanel-himax-hx83121a.c54 int (*init_sequence_dsc)(struct mipi_dsi_multi_context *dsi_ctx);
55 int (*init_sequence)(struct mipi_dsi_multi_context *dsi_ctx);
90 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; in himax_prepare() local
102 ret = ctx->desc->init_sequence_dsc(&dsi_ctx); in himax_prepare()
104 ret = ctx->desc->init_sequence(&dsi_ctx); in himax_prepare()
117 mipi_dsi_picture_parameter_set_multi(&dsi_ctx, &pps); in himax_prepare()
118 mipi_dsi_compression_mode_multi(&dsi_ctx, true); in himax_prepare()
124 static int himax_off(struct mipi_dsi_multi_context *dsi_ctx) in himax_off() argument
126 mipi_dsi_dcs_enter_sleep_mode_multi(dsi_ctx); in himax_off()
127 mipi_dsi_msleep(dsi_ctx, 120); in himax_off()
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H A Dpanel-novatek-nt37801.c51 #define novatek_nt37801_switch_page(dsi_ctx, page) \ argument
52 mipi_dsi_dcs_write_seq_multi((dsi_ctx), NT37801_DCS_SWITCH_PAGE, \
58 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; in novatek_nt37801_on() local
62 novatek_nt37801_switch_page(&dsi_ctx, 0x01); in novatek_nt37801_on()
63 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01); in novatek_nt37801_on()
64 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc5, 0x0b, 0x0b, 0x0b); in novatek_nt37801_on()
65 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xaa, 0x55, 0xa5, 0x80); in novatek_nt37801_on()
66 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02); in novatek_nt37801_on()
67 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf5, 0x10); in novatek_nt37801_on()
68 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x1b); in novatek_nt37801_on()
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H A Dpanel-novatek-nt35560.c151 struct mipi_dsi_multi_context dsi_ctx = { in nt35560_set_brightness() local
161 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, in nt35560_set_brightness()
164 return dsi_ctx.accum_err; in nt35560_set_brightness()
185 mipi_dsi_dcs_write_var_seq_multi(&dsi_ctx, in nt35560_set_brightness()
189 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0xaa); in nt35560_set_brightness()
190 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x01); in nt35560_set_brightness()
191 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x01); in nt35560_set_brightness()
193 mipi_dsi_dcs_write_var_seq_multi(&dsi_ctx, 0x22, pwm_div); in nt35560_set_brightness()
195 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0xaa); in nt35560_set_brightness()
198 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, in nt35560_set_brightness()
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H A Dpanel-startek-kd070fhfid015.c55 struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi}; in stk_panel_init() local
57 mipi_dsi_dcs_soft_reset_multi(&dsi_ctx); in stk_panel_init()
58 mipi_dsi_msleep(&dsi_ctx, 5); in stk_panel_init()
59 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); in stk_panel_init()
60 mipi_dsi_msleep(&dsi_ctx, 120); in stk_panel_init()
62 mipi_dsi_generic_write_seq_multi(&dsi_ctx, DSI_REG_MCAP, 0x04); in stk_panel_init()
65 mipi_dsi_generic_write_seq_multi(&dsi_ctx, DSI_REG_IS, 0x14, 0x08, 0x00, 0x22, 0x00); in stk_panel_init()
66 mipi_dsi_generic_write_seq_multi(&dsi_ctx, DSI_REG_IIS, 0x0c, 0x00); in stk_panel_init()
67 mipi_dsi_generic_write_seq_multi(&dsi_ctx, DSI_REG_CTRL, 0x3a, 0xd3); in stk_panel_init()
69 mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, in stk_panel_init()
84 struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi}; stk_panel_on() local
96 struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi}; stk_panel_off() local
211 struct mipi_dsi_multi_context dsi_ctx = {.dsi = dsi}; dsi_dcs_bl_update_status() local
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H A Dpanel-samsung-sofef00.c58 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; in sofef00_panel_on() local
62 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); in sofef00_panel_on()
63 mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000); in sofef00_panel_on()
65 sofef00_test_key_on_lvl2(&dsi_ctx); in sofef00_panel_on()
66 mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); in sofef00_panel_on()
67 sofef00_test_key_off_lvl2(&dsi_ctx); in sofef00_panel_on()
69 sofef00_test_key_on_lvl2(&dsi_ctx); in sofef00_panel_on()
70 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x07); in sofef00_panel_on()
71 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x12); in sofef00_panel_on()
72 sofef00_test_key_off_lvl2(&dsi_ctx); in sofef00_panel_on()
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H A Dpanel-sony-td4353-jdi.c50 struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; in sony_td4353_jdi_on() local
54 mipi_dsi_dcs_set_column_address_multi(&dsi_ctx, 0x0000, 1080 - 1); in sony_td4353_jdi_on()
55 mipi_dsi_dcs_set_page_address_multi(&dsi_ctx, 0x0000, 2160 - 1); in sony_td4353_jdi_on()
56 mipi_dsi_dcs_set_tear_scanline_multi(&dsi_ctx, 0); in sony_td4353_jdi_on()
57 mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); in sony_td4353_jdi_on()
58 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_ADDRESS_MODE, 0x00); in sony_td4353_jdi_on()
60 mipi_dsi_dcs_set_pixel_format_multi(&dsi_ctx, 0x77); in sony_td4353_jdi_on()
61 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, in sony_td4353_jdi_on()
64 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); in sony_td4353_jdi_on()
65 mipi_dsi_msleep(&dsi_ctx, 70); in sony_td4353_jdi_on()
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H A Dpanel-visionox-rm69299.c196 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; in visionox_rm69299_unprepare() local
200 mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); in visionox_rm69299_unprepare()
203 mipi_dsi_msleep(&dsi_ctx, 120); in visionox_rm69299_unprepare()
205 mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); in visionox_rm69299_unprepare()
213 struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; in visionox_rm69299_prepare() local
223 mipi_dsi_dcs_write_buffer_multi(&dsi_ctx, &ctx->desc->init_seq[i * 2], 2); in visionox_rm69299_prepare()
225 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); in visionox_rm69299_prepare()
228 mipi_dsi_msleep(&dsi_ctx, 120); in visionox_rm69299_prepare()
230 mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); in visionox_rm69299_prepare()
233 mipi_dsi_msleep(&dsi_ctx, 120); in visionox_rm69299_prepare()
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