Searched refs:dsc_enc_caps (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn35/ |
| H A D | dcn35_dsc.c | 31 static void dsc35_get_single_enc_caps(struct dsc_enc_caps *dsc_enc_caps, unsigned int max_dscclk_kh… 116 void dsc35_get_single_enc_caps(struct dsc_enc_caps *dsc_enc_caps, unsigned int max_dscclk_khz) in dsc35_get_single_enc_caps() argument 118 dsc_enc_caps->dsc_version = 0x21; /* v1.2 - DP spec defined it in reverse order and we kept it */ in dsc35_get_single_enc_caps() 120 dsc_enc_caps->slice_caps.bits.NUM_SLICES_1 = 1; in dsc35_get_single_enc_caps() 121 dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 = 1; in dsc35_get_single_enc_caps() 122 dsc_enc_caps->slice_caps.bits.NUM_SLICES_3 = 1; in dsc35_get_single_enc_caps() 123 dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 = 1; in dsc35_get_single_enc_caps() 125 dsc_enc_caps->lb_bit_depth = 13; in dsc35_get_single_enc_caps() 126 dsc_enc_caps->is_block_pred_supported = true; in dsc35_get_single_enc_caps() 128 dsc_enc_caps->color_formats.bits.RGB = 1; in dsc35_get_single_enc_caps() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/ |
| H A D | dc_dsc.c | 157 const struct dsc_enc_caps *dsc_enc_caps, 164 const struct dsc_enc_caps *dsc_caps, 178 struct dsc_enc_caps *dsc_enc_caps, 183 const struct dsc_enc_caps *dsc_enc_caps, 185 struct dsc_enc_caps *dsc_common_caps); 189 const struct dsc_enc_caps *dsc_enc_caps, 470 struct dsc_enc_caps dsc_enc_caps; in dc_dsc_compute_bandwidth_range() local 471 struct dsc_enc_caps dsc_common_caps; in dc_dsc_compute_bandwidth_range() 479 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); in dc_dsc_compute_bandwidth_range() 481 min_dsc_slice_count = get_min_dsc_slice_count_for_odm(dsc, &dsc_enc_caps, timing); in dc_dsc_compute_bandwidth_range() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| H A D | dcn401_dsc.c | 17 static void dsc401_get_single_enc_caps(struct dsc_enc_caps *dsc_enc_caps, unsigned int max_dscclk_k… 66 static void dsc401_get_single_enc_caps(struct dsc_enc_caps *dsc_enc_caps, unsigned int max_dscclk_k… in dsc401_get_single_enc_caps() argument 68 dsc_enc_caps->dsc_version = 0x21; /* v1.2 - DP spec defined it in reverse order and we kept it */ in dsc401_get_single_enc_caps() 70 dsc_enc_caps->slice_caps.bits.NUM_SLICES_1 = 1; in dsc401_get_single_enc_caps() 71 dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 = 1; in dsc401_get_single_enc_caps() 72 dsc_enc_caps->slice_caps.bits.NUM_SLICES_3 = 1; in dsc401_get_single_enc_caps() 73 dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 = 1; in dsc401_get_single_enc_caps() 75 dsc_enc_caps->lb_bit_depth = 13; in dsc401_get_single_enc_caps() 76 dsc_enc_caps->is_block_pred_supported = true; in dsc401_get_single_enc_caps() 78 dsc_enc_caps->color_formats.bits.RGB = 1; in dsc401_get_single_enc_caps() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| H A D | dcn20_dsc.c | 88 void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps, int pixel_clock_100Hz) in dsc2_get_enc_caps() argument 90 dsc_enc_caps->dsc_version = 0x21; /* v1.2 - DP spec defined it in reverse order and we kept it */ in dsc2_get_enc_caps() 92 dsc_enc_caps->slice_caps.bits.NUM_SLICES_1 = 1; in dsc2_get_enc_caps() 93 dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 = 1; in dsc2_get_enc_caps() 94 dsc_enc_caps->slice_caps.bits.NUM_SLICES_3 = 1; in dsc2_get_enc_caps() 95 dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 = 1; in dsc2_get_enc_caps() 97 dsc_enc_caps->lb_bit_depth = 13; in dsc2_get_enc_caps() 98 dsc_enc_caps->is_block_pred_supported = true; in dsc2_get_enc_caps() 100 dsc_enc_caps->color_formats.bits.RGB = 1; in dsc2_get_enc_caps() 101 dsc_enc_caps->color_formats.bits.YCBCR_444 = 1; in dsc2_get_enc_caps() [all …]
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