| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-tpdm.c | 51 drvdata->dsb->edge_ctrl[tpdm_attr->idx]); in tpdm_simple_dataset_show()
56 drvdata->dsb->edge_ctrl_mask[tpdm_attr->idx]); in tpdm_simple_dataset_show()
61 drvdata->dsb->trig_patt[tpdm_attr->idx]); in tpdm_simple_dataset_show()
66 drvdata->dsb->trig_patt_mask[tpdm_attr->idx]); in tpdm_simple_dataset_show()
71 drvdata->dsb->patt_val[tpdm_attr->idx]); in tpdm_simple_dataset_show()
76 drvdata->dsb->patt_mask[tpdm_attr->idx]); in tpdm_simple_dataset_show()
81 drvdata->dsb->msr[tpdm_attr->idx]); in tpdm_simple_dataset_show()
131 drvdata->dsb->trig_patt[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
137 drvdata->dsb->trig_patt_mask[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
143 drvdata->dsb in tpdm_simple_dataset_store()
[all...] |
| /linux/fs/erofs/ |
| H A D | super.c | 43 struct erofs_super_block *dsb = sbdata + EROFS_SUPER_OFFSET; in erofs_superblock_csum_verify() local
49 sizeof(dsb->checksum); in erofs_superblock_csum_verify()
52 crc = crc32c(0x5045B54A, (&dsb->checksum) + 1, len); in erofs_superblock_csum_verify()
53 if (crc == le32_to_cpu(dsb->checksum)) in erofs_superblock_csum_verify()
56 crc, le32_to_cpu(dsb->checksum)); in erofs_superblock_csum_verify()
184 struct erofs_super_block *dsb) in erofs_init_device()
197 ondisk_extradevs = le16_to_cpu(dsb->extra_devices); in erofs_scan_devices()
217 pos = le16_to_cpu(dsb->devt_slotoff) * EROFS_DEVT_SLOT_SIZE; in erofs_scan_devices()
254 struct erofs_super_block *dsb; in erofs_scan_devices()
264 dsb in erofs_read_superblock()
190 erofs_scan_devices(struct super_block * sb,struct erofs_super_block * dsb) erofs_scan_devices() argument
260 struct erofs_super_block *dsb; erofs_read_superblock() local
[all...] |
| /linux/arch/arm/include/asm/ |
| H A D | barrier.h | 20 #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") macro
31 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
38 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
43 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
58 #define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0)
60 #define __arm_heavy_mb(x...) dsb(x)
65 #define rmb() dsb()
|
| H A D | tlbflush.h | 332 dsb(nshst); in local_flush_tlb_all()
338 dsb(nsh); in local_flush_tlb_all()
349 dsb(ishst); in __flush_tlb_all()
355 dsb(ish); in __flush_tlb_all()
385 dsb(nshst); in local_flush_tlb_mm()
391 dsb(nsh); in local_flush_tlb_mm()
399 dsb(ishst); in __flush_tlb_mm()
409 dsb(ish); in __flush_tlb_mm()
442 dsb(nshst); in local_flush_tlb_page()
448 dsb(nsh); in local_flush_tlb_page()
[all …]
|
| /linux/arch/arm64/kvm/hyp/vhe/ |
| H A D | tlb.c | 97 dsb(ishst); in __kvm_tlb_flush_vmid_ipa()
115 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
128 dsb(nshst); in __kvm_tlb_flush_vmid_ipa_nsh()
146 dsb(nsh); in __kvm_tlb_flush_vmid_ipa_nsh()
148 dsb(nsh); in __kvm_tlb_flush_vmid_ipa_nsh()
167 dsb(ishst); in __kvm_tlb_flush_vmid_range()
175 dsb(ish); in __kvm_tlb_flush_vmid_range()
187 dsb(ishst); in __kvm_tlb_flush_vmid()
208 dsb(nsh); in __kvm_flush_cpu_context()
216 dsb(ishs in __kvm_flush_vm_context()
[all...] |
| /linux/arch/arm64/kvm/hyp/nvhe/ |
| H A D | tlb.c | 35 * CPUs, for which a dsb(DOMAIN-st) is what we need, DOMAIN in enter_vmid_context()
41 * registers out of context, for which dsb(nsh) is enough in enter_vmid_context()
43 * The composition of these two barriers is a dsb(DOMAIN), and in enter_vmid_context()
49 dsb(nsh); in enter_vmid_context()
51 dsb(ish); in enter_vmid_context()
169 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
198 dsb(nsh); in __kvm_tlb_flush_vmid_ipa_nsh()
200 dsb(nsh); in __kvm_tlb_flush_vmid_ipa_nsh()
225 dsb(ish); in __kvm_tlb_flush_vmid_range()
256 dsb(ns in __kvm_flush_cpu_context()
[all...] |
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_color.c | 48 void (*color_commit_noarm)(struct intel_dsb *dsb,
57 void (*color_commit_arm)(struct intel_dsb *dsb,
94 void (*load_plane_csc_matrix)(struct intel_dsb *dsb,
98 void (*load_plane_luts)(struct intel_dsb *dsb,
224 static void ilk_update_pipe_csc(struct intel_dsb *dsb, in ilk_update_pipe_csc() argument
231 intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_HI(pipe), in ilk_update_pipe_csc()
233 intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_ME(pipe), in ilk_update_pipe_csc()
235 intel_de_write_dsb(display, dsb, PIPE_CSC_PREOFF_LO(pipe), in ilk_update_pipe_csc()
238 intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_RY_GY(pipe), in ilk_update_pipe_csc()
240 intel_de_write_dsb(display, dsb, PIPE_CSC_COEFF_B in ilk_update_pipe_csc()
330 icl_update_output_csc(struct intel_dsb * dsb,struct intel_crtc * crtc,const struct intel_csc_matrix * csc) icl_update_output_csc() argument
559 ilk_load_csc_matrix(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) ilk_load_csc_matrix() argument
597 icl_load_csc_matrix(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) icl_load_csc_matrix() argument
990 icl_color_commit_noarm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) icl_color_commit_noarm() argument
1004 skl_color_commit_noarm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) skl_color_commit_noarm() argument
1021 ilk_color_commit_noarm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) ilk_color_commit_noarm() argument
1027 i9xx_color_commit_arm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) i9xx_color_commit_arm() argument
1034 ilk_color_commit_arm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) ilk_color_commit_arm() argument
1047 hsw_color_commit_arm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) hsw_color_commit_arm() argument
1120 skl_color_commit_arm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) skl_color_commit_arm() argument
1147 icl_color_commit_arm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) icl_color_commit_arm() argument
1939 intel_color_commit_noarm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) intel_color_commit_noarm() argument
1948 intel_color_commit_arm(struct intel_dsb * dsb,const struct intel_crtc_state * crtc_state) intel_color_commit_arm() argument
3852 xelpd_load_plane_csc_matrix(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) xelpd_load_plane_csc_matrix() argument
3947 xelpd_program_plane_pre_csc_lut(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) xelpd_program_plane_pre_csc_lut() argument
4000 xelpd_program_plane_post_csc_lut(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) xelpd_program_plane_post_csc_lut() argument
4056 xelpd_plane_load_luts(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) xelpd_plane_load_luts() argument
4072 glk_load_lut_3d(struct intel_dsb * dsb,struct intel_crtc * crtc,const struct drm_property_blob * blob) glk_load_lut_3d() argument
4093 glk_lut_3d_commit(struct intel_dsb * dsb,struct intel_crtc * crtc,bool enable) glk_lut_3d_commit() argument
4240 intel_color_plane_commit_arm(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) intel_color_plane_commit_arm() argument
4251 intel_color_load_plane_csc_matrix(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) intel_color_load_plane_csc_matrix() argument
4261 intel_color_load_plane_luts(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) intel_color_load_plane_luts() argument
4280 intel_color_load_3dlut(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) intel_color_load_3dlut() argument
4290 intel_color_plane_program_pipeline(struct intel_dsb * dsb,const struct intel_plane_state * plane_state) intel_color_plane_program_pipeline() argument
[all...] |
| H A D | intel_color.h | 32 void intel_color_commit_noarm(struct intel_dsb *dsb,
34 void intel_color_commit_arm(struct intel_dsb *dsb,
45 void intel_color_plane_program_pipeline(struct intel_dsb *dsb,
47 void intel_color_plane_commit_arm(struct intel_dsb *dsb,
|
| H A D | intel_plane.c | 927 void intel_plane_update_noarm(struct intel_dsb *dsb, in intel_plane_async_flip()
937 intel_fbc_dirty_rect_update_noarm(dsb, plane); in intel_plane_update_arm()
940 plane->update_noarm(dsb, plane, crtc_state, plane_state); in intel_plane_update_arm()
943 void intel_plane_async_flip(struct intel_dsb *dsb, in intel_plane_update_arm()
952 plane->async_flip(dsb, plane, crtc_state, plane_state, async_flip); in intel_plane_disable_arm()
955 void intel_plane_update_arm(struct intel_dsb *dsb, in intel_plane_disable_arm()
963 intel_plane_async_flip(dsb, plane, crtc_state, plane_state, true); in intel_crtc_planes_update_noarm()
968 plane->update_arm(dsb, plane, crtc_state, plane_state); in intel_crtc_planes_update_noarm()
971 void intel_plane_disable_arm(struct intel_dsb *dsb, in intel_crtc_planes_update_noarm()
978 plane->disable_arm(dsb, plan in intel_crtc_planes_update_noarm()
904 intel_plane_update_noarm(struct intel_dsb * dsb,struct intel_plane * plane,const struct intel_crtc_state * crtc_state,const struct intel_plane_state * plane_state) intel_plane_update_noarm() argument
920 intel_plane_async_flip(struct intel_dsb * dsb,struct intel_plane * plane,const struct intel_crtc_state * crtc_state,const struct intel_plane_state * plane_state,bool async_flip) intel_plane_async_flip() argument
932 intel_plane_update_arm(struct intel_dsb * dsb,struct intel_plane * plane,const struct intel_crtc_state * crtc_state,const struct intel_plane_state * plane_state) intel_plane_update_arm() argument
948 intel_plane_disable_arm(struct intel_dsb * dsb,struct intel_plane * plane,const struct intel_crtc_state * crtc_state) intel_plane_disable_arm() argument
958 intel_crtc_planes_update_noarm(struct intel_dsb * dsb,struct intel_atomic_state * state,struct intel_crtc * crtc) intel_crtc_planes_update_noarm() argument
989 skl_crtc_planes_update_arm(struct intel_dsb * dsb,struct intel_atomic_state * state,struct intel_crtc * crtc) skl_crtc_planes_update_arm() argument
1023 i9xx_crtc_planes_update_arm(struct intel_dsb * dsb,struct intel_atomic_state * state,struct intel_crtc * crtc) i9xx_crtc_planes_update_arm() argument
1050 intel_crtc_planes_update_arm(struct intel_dsb * dsb,struct intel_atomic_state * state,struct intel_crtc * crtc) intel_crtc_planes_update_arm() argument
[all...] |
| /linux/arch/arm/mach-omap2/ |
| H A D | omap-smc.S | 29 dsb
51 dsb
69 dsb @ Memory Barrier (not sure if needed, copied from omap_smc2)
77 dsb
85 dsb
93 dsb
|
| H A D | sleep43xx.S | 99 dsb
114 dsb
116 dsb
138 dsb
140 dsb
262 dsb
388 dsb
390 dsb
394 dsb
396 dsb
[all …]
|
| H A D | sleep44xx.S | 27 dsb
29 dsb
132 dsb
224 dsb
349 dsb
|
| H A D | sleep34xx.S | 96 dsb @ data write barrier
212 dsb
296 dsb
299 dsb
417 dsb @ data write barrier
428 dsb @ data write barrier
443 dsb @ data write barrier
|
| /linux/arch/arm64/include/asm/ |
| H A D | tlbflush.h | 104 dsb(ish); in sme_dvmsync_add_pending()
274 dsb(ish); \
283 dsb(ish); in __tlbi_sync_s1ish()
290 dsb(ish); in __tlbi_sync_s1ish_batch()
297 dsb(ish); in __tlbi_sync_s1ish_kernel()
307 dsb(ish); in __tlbi_sync_s1ish_hyp()
376 * TLBF_NOSYNC (don't issue trailing dsb) and TLBF_NOBROADCAST
385 * TLBF_NOSYNC (don't issue trailing dsb) and TLBF_NOBROADCAST
394 dsb(nshst); in local_flush_tlb_all()
396 dsb(ns in local_flush_tlb_all()
[all...] |
| /linux/arch/arm/mm/ |
| H A D | cache-v7.S | 71 3: dsb st
175 dsb
181 dsb st
288 ALT_SMP(W(dsb))
296 dsb ishst
313 dsb ishst
323 dsb
345 ALT_SMP(W(dsb))
353 dsb st
373 ALT_SMP(W(dsb))
[all …]
|
| H A D | cache-xsc3l2.c | 55 dsb(); in xsc3_l2_inv_all()
127 dsb(); in xsc3_l2_inv_range()
145 dsb(); in xsc3_l2_clean_range()
165 dsb(); in xsc3_l2_flush_all()
189 dsb(); in xsc3_l2_flush_range()
|
| H A D | tlb-v7.S | 38 dsb ish
59 dsb ish
72 dsb ish
87 dsb ish
|
| H A D | pv-fixup-asm.S | 25 dsb
72 dsb
77 dsb
81 dsb
|
| H A D | cache-tauros2.c | 92 dsb(); in tauros2_inv_range()
103 dsb(); in tauros2_clean_range()
114 dsb(); in tauros2_flush_range()
|
| /linux/arch/arm64/kernel/pi/ |
| H A D | map_kernel.c | 97 dsb(ishst); in map_kernel()
120 dsb(ishst); in map_kernel()
137 dsb(ishst); in map_kernel()
158 " dsb nsh ;" in set_ttbr0_for_lpa2()
180 dsb(ishst); in remap_idmap_for_lpa2()
191 dsb(ishst); in remap_idmap_for_lpa2()
213 dsb(ishst); in map_fdt()
|
| /linux/arch/arm/kernel/ |
| H A D | v7m.c | 12 dsb(); in armv7m_restart()
15 dsb(); in armv7m_restart()
|
| /linux/tools/testing/selftests/kvm/arm64/ |
| H A D | no-vgic.c | 21 dsb(sy); \
29 dsb(sy); \
39 dsb(sy); \
47 dsb(sy); \
|
| /linux/include/linux/raspberrypi/ |
| H A D | vchiq_core.h | 26 #ifndef dsb
27 #define dsb(a) macro
69 do { debug_ptr[DEBUG_ ## d] = __LINE__; dsb(sy); } while (0)
71 do { debug_ptr[DEBUG_ ## d] = (v); dsb(sy); } while (0)
73 do { debug_ptr[DEBUG_ ## d]++; dsb(sy); } while (0)
|
| /linux/arch/arm64/kernel/ |
| H A D | hibernate-asm.S | 82 dsb ish /* wait for PoU cleaning to finish */
88 dsb ish
|
| /linux/arch/arm64/mm/ |
| H A D | proc.S | 187 dsb nsh
246 dsb nshst
250 dsb nsh
257 dsb nshst
346 dsb ishst
485 dsb nsh
|