Searched refs:dml2_options (Results 1 – 8 of 8) sorted by relevance
390 dc->dml2_options.bbox_overrides.clks_table.num_states = in dcn351_update_bw_bounding_box_fpu()392 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz = in dcn351_update_bw_bounding_box_fpu()394 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].fclk_mhz = in dcn351_update_bw_bounding_box_fpu()396 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dispclk_mhz = in dcn351_update_bw_bounding_box_fpu()398 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dppclk_mhz = in dcn351_update_bw_bounding_box_fpu()400 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].socclk_mhz = in dcn351_update_bw_bounding_box_fpu()402 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].memclk_mhz = in dcn351_update_bw_bounding_box_fpu()404 …dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dram_speed_mts = clock_limits[i].dram_sp… in dcn351_update_bw_bounding_box_fpu()405 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz = in dcn351_update_bw_bounding_box_fpu()407 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels = in dcn351_update_bw_bounding_box_fpu()[all …]
356 dc->dml2_options.bbox_overrides.clks_table.num_states = in dcn35_update_bw_bounding_box_fpu()358 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz = in dcn35_update_bw_bounding_box_fpu()360 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].fclk_mhz = in dcn35_update_bw_bounding_box_fpu()362 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dispclk_mhz = in dcn35_update_bw_bounding_box_fpu()364 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dppclk_mhz = in dcn35_update_bw_bounding_box_fpu()366 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].socclk_mhz = in dcn35_update_bw_bounding_box_fpu()368 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].memclk_mhz = in dcn35_update_bw_bounding_box_fpu()371 …dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dram_speed_mts = clock_limits[i].dram_sp… in dcn35_update_bw_bounding_box_fpu()372 dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dtbclk_mhz = in dcn35_update_bw_bounding_box_fpu()374 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels = in dcn35_update_bw_bounding_box_fpu()[all …]
5638 …resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options) in resource_init_common_dml2_callbacks() argument5640 dml2_options->callbacks.dc = dc; in resource_init_common_dml2_callbacks()5641 dml2_options->callbacks.build_scaling_params = &resource_build_scaling_params; in resource_init_common_dml2_callbacks()5642 dml2_options->callbacks.build_test_pattern_params = &resource_build_test_pattern_params; in resource_init_common_dml2_callbacks()5643 …dml2_options->callbacks.acquire_secondary_pipe_for_mpc_odm = &dc_resource_acquire_secondary_pipe_f… in resource_init_common_dml2_callbacks()5644 …dml2_options->callbacks.update_pipes_for_stream_with_slice_count = &resource_update_pipes_for_stre… in resource_init_common_dml2_callbacks()5645 …dml2_options->callbacks.update_pipes_for_plane_with_slice_count = &resource_update_pipes_for_plane… in resource_init_common_dml2_callbacks()5646 dml2_options->callbacks.get_mpc_slice_index = &resource_get_mpc_slice_index; in resource_init_common_dml2_callbacks()5647 dml2_options->callbacks.get_mpc_slice_count = &resource_get_mpc_slice_count; in resource_init_common_dml2_callbacks()5648 dml2_options->callbacks.get_odm_slice_index = &resource_get_odm_slice_index; in resource_init_common_dml2_callbacks()[all …]
50 dc->dml2_options.gpuvm_enable = true; in dc_setup_system_context()
1104 dc->dml2_options.bb_from_dmub = init_params->bb_from_dmub; in dc_construct()1106 dc->dml2_options.bb_from_dmub = NULL; in dc_construct()
2181 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; in dcn35_resource_construct()2182 dc->dml2_options.use_native_soc_bb_construction = true; in dcn35_resource_construct()2183 dc->dml2_options.minimize_dispclk_using_odm = false; in dcn35_resource_construct()2185 dc->dml2_options.minimize_dispclk_using_odm = true; in dcn35_resource_construct()2186 dc->dml2_options.enable_windowed_mpo_odm = dc->config.enable_windowed_mpo_odm; in dcn35_resource_construct()2188 resource_init_common_dml2_callbacks(dc, &dc->dml2_options); in dcn35_resource_construct()2189 …dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_supp… in dcn35_resource_construct()2191 dc->dml2_options.max_segments_per_hubp = 24; in dcn35_resource_construct()2192 dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/ in dcn35_resource_construct()2193 dc->dml2_options.override_det_buffer_size_kbytes = true; in dcn35_resource_construct()
2154 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count; in dcn351_resource_construct()2155 dc->dml2_options.use_native_soc_bb_construction = true; in dcn351_resource_construct()2156 dc->dml2_options.minimize_dispclk_using_odm = false; in dcn351_resource_construct()2158 dc->dml2_options.minimize_dispclk_using_odm = true; in dcn351_resource_construct()2159 dc->dml2_options.enable_windowed_mpo_odm = dc->config.enable_windowed_mpo_odm; in dcn351_resource_construct()2161 resource_init_common_dml2_callbacks(dc, &dc->dml2_options); in dcn351_resource_construct()2162 …dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch = &dcn30_can_supp… in dcn351_resource_construct()2164 dc->dml2_options.max_segments_per_hubp = 24; in dcn351_resource_construct()2165 dc->dml2_options.det_segment_size = DCN3_2_DET_SEG_SIZE;/*todo*/ in dcn351_resource_construct()2166 dc->dml2_options.override_det_buffer_size_kbytes = true; in dcn351_resource_construct()
1801 struct dml2_configuration_options dml2_options; member