Searched refs:dm_irq_params (Results 1 – 7 of 7) sorted by relevance
1856 !dc_stream_get_scanoutpos(amdgpu_crtc->dm_irq_params.stream, &v_blank_start, in dm_pflip_high_irq()1901 amdgpu_crtc->dm_irq_params.last_flip_vblank = in dm_pflip_high_irq()1996 acrtc->dm_irq_params.stream, 0); in dm_crtc_high_irq_handler()2005 vrr_active, acrtc->dm_irq_params.active_planes); in dm_crtc_high_irq_handler()2033 if (acrtc->dm_irq_params.stream && in dm_crtc_high_irq_handler()2034 acrtc->dm_irq_params.vrr_params.supported) { in dm_crtc_high_irq_handler()2035 bool replay_en = acrtc->dm_irq_params.stream->link->replay_settings.replay_feature_enabled; in dm_crtc_high_irq_handler()2036 bool psr_en = acrtc->dm_irq_params.stream->link->psr_settings.psr_feature_enabled; in dm_crtc_high_irq_handler()2037 bool fs_active_var_en = acrtc->dm_irq_params.freesync_config.state == VRR_STATE_ACTIVE_VARIABLE; in dm_crtc_high_irq_handler()2040 acrtc->dm_irq_params.stream, in dm_crtc_high_irq_handler()[all …]
32 struct dm_irq_params { struct
3904 acrtc->dm_irq_params.window_param[0].x_start = (uint16_t) val; in crc_win_x_start_set()3905 acrtc->dm_irq_params.window_param[0].update_win = false; in crc_win_x_start_set()3921 *val = acrtc->dm_irq_params.window_param[0].x_start; in crc_win_x_start_get()3941 acrtc->dm_irq_params.window_param[0].y_start = (uint16_t) val; in crc_win_y_start_set()3942 acrtc->dm_irq_params.window_param[0].update_win = false; in crc_win_y_start_set()3958 *val = acrtc->dm_irq_params.window_param[0].y_start; in crc_win_y_start_get()3977 acrtc->dm_irq_params.window_param[0].x_end = (uint16_t) val; in crc_win_x_end_set()3978 acrtc->dm_irq_params.window_param[0].update_win = false; in crc_win_x_end_set()3994 *val = acrtc->dm_irq_params.window_param[0].x_end; in crc_win_x_end_get()4013 acrtc->dm_irq_params.window_param[0].y_end = (uint16_t) val; in crc_win_y_end_set()[all …]
179 if (!acrtc->dm_irq_params.stream) { in dm_vblank_get_counter() 185 return dc_stream_get_vblank_counter(acrtc->dm_irq_params.stream); in dm_vblank_get_counter() 201 if (!acrtc->dm_irq_params.stream) { in dm_crtc_get_scanoutpos() 214 dc_stream_get_scanoutpos(acrtc->dm_irq_params.stream, in dm_crtc_get_scanoutpos() 3725 acrtc_attach->dm_irq_params.allow_sr_entry = !aconn->sr_skip_count; in amdgpu_dm_enable_self_refresh() 3735 if (acrtc_attach->dm_irq_params.allow_sr_entry && in dm_arm_vblank_event() 3744 acrtc_attach->dm_irq_params.allow_sr_entry = false; in dm_arm_vblank_event() 3953 acrtc_attach->dm_irq_params.allow_sr_entry && in amdgpu_dm_commit_planes() 4034 last_flip_vblank = acrtc_attach->dm_irq_params.last_flip_vblank; in amdgpu_dm_commit_planes() 4124 &acrtc_attach->dm_irq_params in amdgpu_dm_commit_planes() [all...]
76 return acrtc->dm_irq_params.freesync_config.state == in amdgpu_dm_crtc_vrr_active_irq()78 acrtc->dm_irq_params.freesync_config.state == in amdgpu_dm_crtc_vrr_active_irq()
116 acrtc->dm_irq_params.freesync_config.state = VRR_STATE_ACTIVE_VARIABLE; in dm_test_crtc_vrr_active_irq_variable()132 acrtc->dm_irq_params.freesync_config.state = VRR_STATE_ACTIVE_FIXED; in dm_test_crtc_vrr_active_irq_fixed()148 acrtc->dm_irq_params.freesync_config.state = VRR_STATE_INACTIVE; in dm_test_crtc_vrr_active_irq_inactive()164 acrtc->dm_irq_params.freesync_config.state = VRR_STATE_DISABLED; in dm_test_crtc_vrr_active_irq_disabled()180 acrtc->dm_irq_params.freesync_config.state = VRR_STATE_UNSUPPORTED; in dm_test_crtc_vrr_active_irq_unsupported()
3390 acrtc->dm_irq_params.freesync_config.state = VRR_STATE_ACTIVE_VARIABLE; in dm_test_crtc_high_irq_vrr_pre_ai()3428 acrtc->dm_irq_params.freesync_config.state = VRR_STATE_ACTIVE_VARIABLE; in dm_test_crtc_high_irq_vrr_ai_no_stream()