Searched refs:de_pipe_imr_mask (Results 1 – 2 of 2) sorted by relevance
240 new_val = display->irq.de_pipe_imr_mask[pipe]; in bdw_update_pipe_irq()244 if (new_val != display->irq.de_pipe_imr_mask[pipe]) { in bdw_update_pipe_irq()245 display->irq.de_pipe_imr_mask[pipe] = new_val; in bdw_update_pipe_irq()246 intel_de_write(display, GEN8_DE_PIPE_IMR(pipe), display->irq.de_pipe_imr_mask[pipe]); in bdw_update_pipe_irq()2187 display->irq.de_pipe_imr_mask[pipe], in gen8_irq_power_well_post_enable()2188 ~display->irq.de_pipe_imr_mask[pipe] | extra_ier); in gen8_irq_power_well_post_enable()2396 display->irq.de_pipe_imr_mask[pipe] = ~de_pipe_masked; in gen8_de_irq_postinstall()2401 display->irq.de_pipe_imr_mask[pipe], in gen8_de_irq_postinstall()
518 u32 de_pipe_imr_mask[I915_MAX_PIPES]; member