Searched refs:ddiv (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/clk/x86/ |
| H A D | clk-cgu.c | 395 struct lgm_clk_ddiv *ddiv = to_lgm_clk_ddiv(hw); in lgm_clk_ddiv_recalc_rate() local
399 div0 = lgm_get_clk_val(ddiv->membase, ddiv->reg, in lgm_clk_ddiv_recalc_rate()
400 ddiv->shift0, ddiv->width0) + 1; in lgm_clk_ddiv_recalc_rate()
401 div1 = lgm_get_clk_val(ddiv->membase, ddiv->reg, in lgm_clk_ddiv_recalc_rate()
402 ddiv->shift1, ddiv->width1) + 1; in lgm_clk_ddiv_recalc_rate()
403 exdiv = lgm_get_clk_val(ddiv->membase, ddiv->reg, in lgm_clk_ddiv_recalc_rate()
404 ddiv->shift2, ddiv->width2); in lgm_clk_ddiv_recalc_rate()
410 do_div(prate, ddiv->div); in lgm_clk_ddiv_recalc_rate()
411 prate *= ddiv->mult; in lgm_clk_ddiv_recalc_rate()
419 struct lgm_clk_ddiv *ddiv = to_lgm_clk_ddiv(hw); in lgm_clk_ddiv_enable() local
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gf100.c | 37 u32 ddiv; member
210 calc_div(struct gf100_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv) in calc_div() argument
216 *ddiv = div - 2; in calc_div()
221 calc_src(struct gf100_clk *clk, int idx, u32 freq, u32 *dsrc, u32 *ddiv) in calc_src() argument
226 *ddiv = 0x00000000; in calc_src()
245 sclk = calc_div(clk, idx, sclk, freq, ddiv); in calc_src()
302 info->ddiv |= 0x80000000; in calc_clk()
303 info->ddiv |= div0 << 8; in calc_clk()
304 info->ddiv |= div0; in calc_clk()
349 nvkm_mask(device, 0x1371d0 + (idx * 0x04), 0x80003f3f, info->ddiv); in gf100_clk_prog_0()
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| H A D | gk104.c | 37 u32 ddiv; member
223 calc_div(struct gk104_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv) in calc_div() argument
229 *ddiv = div - 2; in calc_div()
234 calc_src(struct gk104_clk *clk, int idx, u32 freq, u32 *dsrc, u32 *ddiv) in calc_src() argument
239 *ddiv = 0x00000000; in calc_src()
258 sclk = calc_div(clk, idx, sclk, freq, ddiv); in calc_src()
316 info->ddiv |= 0x80000000; in calc_clk()
317 info->ddiv |= div0; in calc_clk()
362 nvkm_mask(device, 0x1371d0 + (idx * 0x04), 0x8000003f, info->ddiv); in gk104_clk_prog_0()
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| /linux/drivers/clk/renesas/ |
| H A D | rzv2h-cpg.c | 210 struct ddiv ddiv; member
426 struct ddiv ddiv = dsi_div->ddiv; in rzv2h_cpg_plldsi_div_recalc_rate() local
429 div = readl(priv->base + ddiv.offset); in rzv2h_cpg_plldsi_div_recalc_rate()
430 div >>= ddiv.shift; in rzv2h_cpg_plldsi_div_recalc_rate()
431 div &= clk_div_mask(ddiv.width); in rzv2h_cpg_plldsi_div_recalc_rate()
487 struct ddiv ddiv = dsi_div->ddiv; in rzv2h_cpg_plldsi_div_set_rate() local
505 shift = ddiv.shift; in rzv2h_cpg_plldsi_div_set_rate()
506 val = readl(priv->base + ddiv.offset) | DDIV_DIVCTL_WEN(shift); in rzv2h_cpg_plldsi_div_set_rate()
507 val &= ~(clk_div_mask(ddiv.width) << shift); in rzv2h_cpg_plldsi_div_set_rate()
509 writel(val, priv->base + ddiv.offset); in rzv2h_cpg_plldsi_div_set_rate()
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| H A D | rzv2h-cpg.h | 52 struct ddiv { struct
69 ((struct ddiv){ \ argument
77 ((struct ddiv){ \
184 struct ddiv ddiv; member
223 .cfg.ddiv = _ddiv_packed, \
240 .cfg.ddiv = _ddiv_packed, \
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