| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 120 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn201_update_clocks()
121 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn201_update_clocks()
123 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
124 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv1_clk_mgr.c | 227 || new_clocks->dcfclk_khz > clk_mgr_base->clks.dcfclk_khz) in rv1_update_clocks()
245 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rv1_update_clocks()
246 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rv1_update_clocks()
265 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
285 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.c | 259 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn2_update_clocks()
260 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn2_update_clocks()
262 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn2_update_clocks()
263 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks()
265 …_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn2_update_clocks()
357 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) { in dcn2_update_clocks_fpga()
358 clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks_fpga()
478 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn2_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 231 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn3_update_clocks()
232 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn3_update_clocks()
234 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn3_update_clocks()
235 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn3_update_clocks()
236 …0_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCEFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn3_update_clocks()
442 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn3_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 87 …in_out->programming->min_clocks.dcn4x.active.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_dcfclk_… in calculate_system_active_minimums()
128 …in_out->programming->min_clocks.dcn4x.svp_prefetch.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_d… in calculate_svp_prefetch_minimums()
159 …in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.dcfclk_khz = dml_round_up(min_dcfcl… in calculate_svp_prefetch_minimums()
183 …in_out->programming->min_clocks.dcn4x.idle.dcfclk_khz = dml_round_up(min_dcfclk_avg > min_dcfclk_l… in calculate_idle_minimums()
287 …result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.active.dcfclk_khz, &state_table->dcfc… in map_soc_min_clocks_to_dpm_fine_grained()
294 …result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.svp_prefetch.dcfclk_khz, &state_table… in map_soc_min_clocks_to_dpm_fine_grained()
301 …result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.idle.dcfclk_khz, &state_table->dcfclk… in map_soc_min_clocks_to_dpm_fine_grained()
309 …if (!round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.svp_prefetch_no_throttle.dcfclk_khz, &sta… in map_soc_min_clocks_to_dpm_fine_grained()
312 display_cfg->min_clocks.dcn4x.svp_prefetch_no_throttle.dcfclk_khz = 0; in map_soc_min_clocks_to_dpm_fine_grained()
328 …if (display_cfg->min_clocks.dcn4x.active.dcfclk_khz <= state_table->dcfclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| H A D | dml_top_types.h | 366 unsigned long dcfclk_khz; member
378 unsigned long dcfclk_khz; member
383 unsigned long dcfclk_khz; member
388 unsigned long dcfclk_khz; member
393 unsigned long dcfclk_khz; member
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 445 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn35_update_clocks()
446 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn35_update_clocks()
448 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn35_update_clocks()
449 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn35_update_clocks()
450 dcn35_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn35_update_clocks()
510 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn35_update_clocks()
564 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn35_are_clock_states_equal()
1101 new_clocks->dcfclk_khz = 400000; in dcn35_update_clocks_fpga()
1112 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) { in dcn35_update_clocks_fpga()
1113 clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn35_update_clocks_fpga()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 561 new_clocks->dcfclk_khz > 0 && in dcn32_auto_dpm_test_log()
603 new_clocks->dcfclk_khz, in dcn32_auto_dpm_test_log()
677 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn32_update_clocks()
678 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn32_update_clocks()
680 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && in dcn32_update_clocks()
682 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn32_update_clocks()
683 …32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn32_update_clocks()
1079 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn32_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_clk_mgr.c | 190 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn316_update_clocks()
191 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn316_update_clocks()
192 dcn316_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn316_update_clocks()
241 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn316_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 182 new_clocks->dcfclk_khz = UNSUPPORTED_DCFCLK; in dcn315_update_clocks()
183 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn315_update_clocks()
184 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn315_update_clocks()
185 dcn315_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn315_update_clocks()
237 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn315_update_clocks()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | vg_clk_mgr.c | 142 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && !dc-… in vg_update_clocks()
143 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in vg_update_clocks()
144 dcn301_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in vg_update_clocks()
472 else if (a->dcfclk_khz != b->dcfclk_khz) in vg_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 174 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks()
175 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rn_update_clocks()
176 rn_vbios_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in rn_update_clocks()
535 else if (a->dcfclk_khz != b->dcfclk_khz) in rn_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 451 new_clocks->dcfclk_khz > 0 && in dcn401_auto_dpm_test_log()
494 new_clocks->dcfclk_khz, in dcn401_auto_dpm_test_log()
830 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn401_build_update_bandwidth_clocks_sequence()
831 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn401_build_update_bandwidth_clocks_sequence()
833 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn401_build_update_bandwidth_clocks_sequence()
834 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn401_build_update_bandwidth_clocks_sequence()
837 …[num_steps].params.update_hardmin_params.freq_mhz = khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz); in dcn401_build_update_bandwidth_clocks_sequence()
1427 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn401_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/ |
| H A D | dml2_internal_shared_types.h | 187 unsigned long dcfclk_khz; member
196 unsigned long dcfclk_khz; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_wrapper.h | 60 unsigned int dcfclk_khz; member
|
| H A D | dml2_utils.c | 185 context->bw_ctx.bw.dcn.clk.dcfclk_khz = out_clks->dcfclk_khz; in dml2_copy_clocks_to_dc_state()
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| H A D | dml2_wrapper.c | 590 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
648 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 778 …if (dcn32_subvp_in_use(dc, context) && context->bw_ctx.bw.dcn.clk.dcfclk_khz <= MIN_SUBVP_DCFCLK_K… in dcn32_override_min_req_dcfclk()
779 context->bw_ctx.bw.dcn.clk.dcfclk_khz = MIN_SUBVP_DCFCLK_KHZ; in dcn32_override_min_req_dcfclk()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 502 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 in dcn31_calculate_wm_and_dlg_fp()
567 context->bw_ctx.bw.dcn.clk.dcfclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4.c | 416 …in_out->mode_support_result.global.active.dcfclk_khz = (unsigned long)(core->clean_me_up.mode_lib.… in core_dcn4_mode_support()
420 …in_out->mode_support_result.global.svp_prefetch.dcfclk_khz = (unsigned long)core->clean_me_up.mode… in core_dcn4_mode_support()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_translation_helper.c | 1076 …context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc.h | 594 int dcfclk_khz; member
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| /linux/drivers/gpu/drm/amd/display/dmub/inc/ |
| H A D | dmub_cmd.h | 2179 uint32_t dcfclk_khz; /**< dcfclk kHz */ member
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 750 clocks->dcfclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dcfclk_mhz * 1000; in dcn32_initialize_min_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 1163 context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000); in dcn_validate_bandwidth()
|