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Searched refs:dcc_mrq_enable (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn5_calcs_dchub.c2691 bool dcc_mrq_enable; in dcn5_calculate_prefetch_schedule() local
2741 dcc_mrq_enable = (p->dcc_enable && p->mrq_present); in dcn5_calculate_prefetch_schedule()
2752 DML_LOG_VERBOSE("DML::%s: dcc_mrq_enable = %u\n", __func__, dcc_mrq_enable); in dcn5_calculate_prefetch_schedule()
2789 if (dcc_mrq_enable) in dcn5_calculate_prefetch_schedule()
2894 if (p->DynamicMetadataEnable || dcc_mrq_enable || p->setup_for_tdlut) in dcn5_calculate_prefetch_schedule()
2904 if (p->display_cfg->gpuvm_enable == true || p->setup_for_tdlut || dcc_mrq_enable) { in dcn5_calculate_prefetch_schedule()
2917 …} else if (p->display_cfg->gpuvm_max_page_table_levels == 1 && !dcc_mrq_enable && !p->setup_for_td… in dcn5_calculate_prefetch_schedule()
2984 if ((p->display_cfg->gpuvm_enable == true || p->setup_for_tdlut || dcc_mrq_enable)) { in dcn5_calculate_prefetch_schedule()
3242 if (p->display_cfg->gpuvm_enable == true || dcc_mrq_enable || p->setup_for_tdlut) { in dcn5_calculate_prefetch_schedule()
4009 bool dcc_mrq_enable, in dcn5_calculate_flip_schedule()
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