Searched refs:coreclk (Results 1 – 16 of 16) sorted by relevance
56 clocks = <&coreclk 0>;66 clocks = <&coreclk 0>;76 clocks = <&coreclk 0>;86 clocks = <&coreclk 0>;96 clocks = <&coreclk 0>;117 clocks = <&coreclk 0>;126 clocks = <&coreclk 0>;136 clocks = <&coreclk 0>;146 clocks = <&coreclk 0>;281 clocks = <&coreclk 0>;[all …]
56 clocks = <&coreclk 0>;66 clocks = <&coreclk 0>;76 clocks = <&coreclk 0>;86 clocks = <&coreclk 0>;96 clocks = <&coreclk 0>;131 clocks = <&coreclk 2>;138 clocks = <&coreclk 2>;156 clocks = <&coreclk 0>;166 clocks = <&coreclk 0>;176 clocks = <&coreclk 0>;[all …]
93 clocks = <&coreclk 2>;111 clocks = <&coreclk 0>;121 clocks = <&coreclk 0>;131 clocks = <&coreclk 0>;141 clocks = <&coreclk 0>;151 clocks = <&coreclk 0>;161 clocks = <&coreclk 0>;171 clocks = <&coreclk 0>;181 clocks = <&coreclk 0>;252 clocks = <&coreclk 0>;[all …]
89 clocks = <&coreclk 0>;99 clocks = <&coreclk 0>;109 clocks = <&coreclk 0>;119 clocks = <&coreclk 0>;129 clocks = <&coreclk 0>;159 clocks = <&coreclk 2>;221 clocks = <&coreclk 0>;233 clocks = <&coreclk 0>;243 clocks = <&coreclk 0>;253 clocks = <&coreclk 0>;[all …]
61 clocks = <&coreclk 0>;73 clocks = <&coreclk 0>;85 clocks = <&coreclk 0>;89 coreclk: mvebu-sar@18230 { label106 clocks = <&coreclk 1>;255 clocks = <&coreclk 2>, <&refclk>;261 clocks = <&coreclk 2>, <&refclk>;
136 clocks = <&coreclk 0>;151 clocks = <&coreclk 0>;175 clocks = <&coreclk 0>;179 coreclk: mvebu-sar@18230 { label313 clocks = <&coreclk 2>;318 clocks = <&coreclk 2>;322 clocks = <&coreclk 0>;326 clocks = <&coreclk 0>;
154 clocks = <&coreclk 0>;162 clocks = <&coreclk 1>;234 coreclk: mvebu-sar@f8204 { label291 clocks = <&coreclk 2>, <&refclk>;297 clocks = <&coreclk 2>, <&refclk>;
234 clocks = <&coreclk 0>;249 clocks = <&coreclk 0>;
361 clocks = <&coreclk 0>;376 clocks = <&coreclk 0>;
410 clocks = <&coreclk 0>;425 clocks = <&coreclk 0>;
75 clocks = <&coreclk 0>;
80 clocks = <&coreclk 0>;
86 clocks = <&coreclk 0>;
33 struct clk *coreclk; member264 pcie->coreclk = devm_clk_get(dev, "core"); in visconti_get_resources()265 if (IS_ERR(pcie->coreclk)) in visconti_get_resources()266 return dev_err_probe(dev, PTR_ERR(pcie->coreclk), in visconti_get_resources()
113 * @coreclk: core clock for register access via DMA139 struct clk *coreclk; member 1596 spdif_priv->coreclk = devm_clk_get(&pdev->dev, "core"); in fsl_spdif_probe() 1597 if (IS_ERR(spdif_priv->coreclk)) { in fsl_spdif_probe() 1599 return PTR_ERR(spdif_priv->coreclk); in fsl_spdif_probe() 1687 clk_disable_unprepare(spdif_priv->coreclk); in fsl_spdif_runtime_suspend() 1698 ret = clk_prepare_enable(spdif_priv->coreclk); in fsl_spdif_runtime_resume() 1737 clk_disable_unprepare(spdif_priv->coreclk); in fsl_spdif_runtime_resume()
1175 pruss_coreclk_mux: coreclk-mux@3c {